Jason Pritchard

US Patent:

7409667, Aug 5, 2008

Filed:

Dec 15, 2005

Appl. No.:

11/303602

Inventors:

Jason Pritchard - Hopkinton MA, US
Venkat Raghavan Satagopan - Rolla MO, US

Assignee:

EMC Corporation - Hopkinton MA

International Classification:

G06F 17/50

US Classification:

716 15, 716 1, 716 4, 716 11

Abstract:

A technique generates circuit board modeling data for a circuit board structure having multiple layers. The technique includes receiving a set of global circuit board dimension parameters from a user. The set of global circuit board dimension parameters defines a set of global circuit board dimensions of the circuit board structure. The technique further includes forming, for each layer, a set of individual circuit board dimension parameters defining a set of individual circuit board dimensions for that layer based on the set of global circuit board dimension parameters. The technique further includes providing a script for use by a 3D modeling subsystem. The script includes a set of circuit board design values based on the set of individual circuit board dimension parameters formed for each layer. Other properties such as layer width and thickness, via dimensions, etc. are handled in a similar manner.

US Patent:

7705246, Apr 27, 2010

Filed:

Dec 28, 2007

Appl. No.:

11/965811

Inventors:

Jason Pritchard - Hopkinton MA, US
Michael Gnieski - Shrewsbury MA, US

Assignee:

EMC Corporation - Hopkinton MA

International Classification:

H01R 12/04
H05K 1/11

US Classification:

174262, 361792

Abstract:

A differential signal via structure for a printed circuit board having a pair of signal vias extending vertically from a surface of the board to an interior region of the board to contact signal conductors disposed horizontally within the interior region of the board and a pair of ground vias extending vertically from a surface of the circuit board to an interior region of the board to contact ground conductors disposed horizontally within the interior region of the board.

US Patent:

8416772, Apr 9, 2013

Filed:

Jun 26, 2007

Appl. No.:

11/768319

Inventors:

Jason Pritchard - Hopkinton MA, US

Assignee:

EMC Corporation - Hopkinton MA

International Classification:

H04J 9/00

US Classification:

370363, 370297

Abstract:

A link control card for disk drives. The link control card includes: a first connector for carrying relatively high frequency user data and low frequency signals; a diplexer connected to the connector, such diplexer having a first port for the high frequency user data and a second port for the low frequency signals; an optical connector for carrying the relatively high frequency user data; and a high frequency user data communication channel disposed between the diplexer and the disk drives for selectively connected either the first port of the diplexer or the optical connector to the disk drives.

US Patent:

8589729, Nov 19, 2013

Filed:

Sep 28, 2007

Appl. No.:

11/864094

Inventors:

Jason Pritchard - Hopkinton MA, US
Himanshu Agrawal - Cambridge MA, US
Michael Robillard - Shrewsbury MA, US
Robert Beauchamp - Milford MA, US

Assignee:

EMC Corporation - Hopkinton MA

International Classification:

G06F 11/00

US Classification:

714 14

Abstract:

A data preservation device includes a circuit board configured to be positioned within a memory module slot of a computing device and releasably engage a memory bus of the computing device. A non-volatile memory storage device is electrically coupled to the circuit board. A control circuit is electrically coupled to the circuit board and is configured to read a data portion from the computing device and write the data portion to the non-volatile memory storage device during the occurrence of a power failure event on the computing device. An independent power supply is configured to power the data preservation device during the power failure event.

US Patent:

20220200179, Jun 23, 2022

Filed:

Dec 21, 2020

Appl. No.:

17/128848

Inventors:

- Round Rock TX, US
Stephen E. Strickland - Foxborough MA, US
Jason Pritchard - Hopkinton MA, US

International Classification:

H01R 12/72
H01R 12/79
H01R 12/70
H01R 13/518

Abstract:

An information handling system includes first and second printed circuit boards (PCBs), and first and second connectors. The first PCB includes a first top surface, a first bottom, and a first plurality of side surfaces extending between the first top and first bottom surfaces. The first connector is embedded within the first PCB, and extends from the first bottom surface toward the first top surface. A first height of the first connector is substantially equal to a first thickness of the first PCB. The second PCB includes a second top surface, a second bottom, and a second plurality of side surfaces extending between the second top and second bottom surfaces. The second connector is embedded within the second PCB, and extends from the second bottom surface toward the second top surface. A second height of the second connector is greater than a second thickness of the second printed circuit board.

US Patent:

20230032655, Feb 2, 2023

Filed:

Jul 28, 2021

Appl. No.:

17/387406

Inventors:

- Round Rock TX, US
Jason Pritchard - Hopkinton MA, US
Raymond Pavlak, JR. - Shrewsbury MA, US

International Classification:

H05K 1/02
H01P 3/08
H05K 3/10

Abstract:

A printed circuit board of an information handling system includes a dielectric layer, adjacent differential pairs, a ground layer, and a ground wall. The adjacent differential pairs are plated on the dielectric layer, and generate crosstalk between each other. The ground wall is in physical communication with and electrically coupled to the ground layer. The ground wall extends substantially perpendicular from the ground layer through the dielectric layer. A top surface of the ground wall is a specific height above a top surface of the adjacent different pairs. The ground wall suppresses the generated crosstalk based on the specific height and a width of the ground wall.

US Patent:

20230010249, Jan 12, 2023

Filed:

Jul 6, 2021

Appl. No.:

17/367885

Inventors:

- Round Rock TX, US
Jason Charles Pritchard - Hopkinton MA, US
Stephen Edward Strickland - Foxborough MA, US

International Classification:

H05K 1/11
H05K 5/02
H01R 12/72
H01R 12/73

Abstract:

A computing card for an information handling system, the computing card system including a computing card, including: a first side including: a first body surface, the first body surface including a first plurality of conductive pads configured to connect respectively with a first set of pins of a computing card receptacle; a first indented surface configured to connect with a second set of pins of the computing card receptacle; a first connecting surface defined between the first body surface and the first indented surface; a bottom surface; and a plurality of internal layers, wherein one or more of the internal layers are exposed at the first indented surface, and are connected to the bottom surface.

US Patent:

20210117363, Apr 22, 2021

Filed:

Oct 17, 2019

Appl. No.:

16/655748

Inventors:

- Round Rock TX, US
Jason Pritchard - Hopkinton MA, US
Andy Qiang Liu - Shanghai, CN
James E. Roche - Rehoboth MA, US
Lynn Lingyu Kong - Shanghai, CN
Jeremy Qiu - Shanghai, CN

Assignee:

DELL PRODUCTS L.P. - Round Rock TX

International Classification:

G06F 13/42
G06F 13/12

Abstract:

A system for data communications, comprising an upstream component configured to select an in-band peripheral component interconnect express (PCIe) equalization procedure or an out-of-band PCIe equalization procedure and a downstream component configured to respond to the selected one of the in-band PCIe equalization procedure or the out-of-band PCIe equalization procedure to enable PCIe communications with the upstream component.