Jason D Reece

US Patent:

20210167079, Jun 3, 2021

Filed:

Feb 11, 2021

Appl. No.:

17/173405

Inventors:

- Boise ID, US
Jason C. McFarland - Boise ID, US
Jason Reece - Boise ID, US
David A. Kewley - Boise ID, US
Adam L. Olson - Boise ID, US

International Classification:

H01L 27/11556
H01L 21/3213
H01L 21/311

Abstract:

Methods of improving adhesion between a photoresist and conductive or insulating structures. The method comprises forming a slot through at least a portion of alternating conductive structures and insulating structures on a substrate. Portions of the conductive structures or of the insulating structures are removed to form recesses in the conductive structures or in the insulating structures. A photoresist is formed over the alternating conductive structures and insulating structures and within the slot. Methods of improving adhesion between a photoresist and a spin-on dielectric material are also disclosed, as well as methods of forming a staircase structure.

US Patent:

20190371728, Dec 5, 2019

Filed:

Jun 1, 2018

Appl. No.:

15/995475

Inventors:

- Boise ID, US
M. Jared Barclay - Middleton ID, US
Matthew J. King - Boise ID, US
Eldon Nelson - Dripping Springs TX, US
Matthew Park - Boise ID, US
Jason Reece - Boise ID, US
Lifang Xu - Boise ID, US
Bo Zhao - Boise ID, US

Assignee:

Micron Technology, Inc. - Boise ID

International Classification:

H01L 23/528
H01L 27/11556
H01L 27/11582
H01L 27/11524
H01L 27/1157
H01L 27/11575
H01L 27/11548
H01L 23/522
H01L 21/768

Abstract:

A method used in forming integrated circuitry comprises forming a stack of vertically-alternating tiers of different composition materials. A stair-step structure is formed into the stack and an upper landing is formed adjacent and above the stair-step structure. The stair-step structure is formed to comprise vertically-alternating tiers of the different composition materials. A plurality of stairs individually comprise two of the tiers of different composition materials. At least some of the stairs individually have only two tiers that are each only of a different one of the different composition materials. An upper of the stairs that is below the upper landing comprises at least four of the tiers of different composition materials. Structure independent of method is disclosed.

US Patent:

20190355735, Nov 21, 2019

Filed:

Aug 5, 2019

Appl. No.:

16/531815

Inventors:

- Boise ID, US
Jason C. McFarland - Boise ID, US
Jason Reece - Boise ID, US
David A. Kewley - Boise ID, US
Adam L. Olson - Boise ID, US

International Classification:

H01L 27/11556
H01L 21/311
H01L 21/3213

Abstract:

Methods of improving adhesion between a photoresist and conductive or insulating structures. The method comprises forming a slot through at least a portion of alternating conductive structures and insulating structures on a substrate. Portions of the conductive structures or of the insulating structures are removed to form recesses in the conductive structures or in the insulating structures. A photoresist is formed over the alternating conductive structures and insulating structures and within the slot. Methods of improving adhesion between a photoresist and a spin-on dielectric material are also disclosed, as well as methods of forming a staircase structure.

US Patent:

20190081061, Mar 14, 2019

Filed:

Sep 14, 2017

Appl. No.:

15/705179

Inventors:

- Boise ID, US
Justin B. Dorhout - Boise ID, US
Indra V. Chary - Boise ID, US
Jun Fang - Boise ID, US
Matthew Park - Boise ID, US
Zhiqiang Xie - Meridian ID, US
Scott D. Stull - Boise ID, US
Daniel Osterberg - Boise ID, US
Jason Reece - Boise ID, US
Jian Li - Boise ID, US

International Classification:

H01L 27/11582
H01L 21/768
H01L 21/311
H01L 27/11556
H01L 21/02
H01L 29/10
H01L 23/522
H01L 23/528

Abstract:

A device comprises an array of elevationally-extending transistors and a circuit structure adjacent and electrically coupled to the elevationally-extending transistors of the array. The circuit structure comprises a stair step structure comprising vertically-alternating tiers comprising conductive steps that are at least partially elevationally separated from one another by insulative material. Operative conductive vias individually extend elevationally through one of the conductive steps at least to a bottom of the vertically-alternating tiers and individually electrically couple to an electronic component below the vertically-alternating tiers. Dummy structures individually extend elevationally through one of the conductive steps at least to the bottom of the vertically-alternating tiers. Methods are also disclosed.

US Patent:

20180366481, Dec 20, 2018

Filed:

Jun 15, 2017

Appl. No.:

15/624422

Inventors:

- Boise ID, US
Jason C. McFarland - Boise ID, US
Jason Reece - Boise ID, US
David A. Kewley - Boise ID, US
Adam L. Olson - Boise ID, US

International Classification:

H01L 27/11556
H01L 27/11582
H01L 21/3213
H01L 21/311

Abstract:

Methods of improving adhesion between a photoresist and conductive or insulating structures. The method comprises forming a slot through at least a portion of alternating conductive structures and insulating structures on a substrate. Portions of the conductive structures or of the insulating structures are removed to form recesses in the conductive structures or in the insulating structures. A photoresist is formed over the alternating conductive structures and insulating structures and within the slot. Methods of improving adhesion between a photoresist and a spin-on dielectric material are also disclosed, as well as methods of forming a staircase structure.