Jason Whiteman

US Patent:

20040193770, Sep 30, 2004

Filed:

Aug 7, 2003

Appl. No.:

10/636171

Inventors:

Jason Whiteman - Spring TX, US
Sajid Momin - Houston TX, US

International Classification:

G06F013/14
G06F012/00

US Classification:

710/305000, 711/100000

Abstract:

Various exemplary embodiments are disclosed for communicating information in a computer system. In at least some embodiments, a computer system may include: a storage controller, a storage device coupled via a primary bus to the storage controller, a backplane controller coupled via a secondary bus to the storage controller, a status indicator responsive to information received from the backplane controller to indicate the status of the storage device, where the received information indicates the status of the storage device, and where the information conveyed to the status indicator is conveyed via the secondary bus.

US Patent:

20040225816, Nov 11, 2004

Filed:

Jun 1, 2001

Appl. No.:

09/872600

Inventors:

Kevin Leigh - Houston TX, US
Tuan Pham - Sugar Land TX, US
Jason Whiteman - Cypress TX, US

International Classification:

G06F013/40
G06F013/38

US Classification:

710/305000

Abstract:

A system and method of automatically switching control of a bus in a processor-based device is provided. In a server, control of a bus is automatically switched from a controller mounted on the system board to a controller located on an optional expansion card upon connection of the expansion card to the system board. Automatic switching includes isolating the on-board controller from the bus and appropriately terminating any transmission line ends on the bus resulting from the establishment of the alternative control path.

US Patent:

20130290785, Oct 31, 2013

Filed:

Apr 30, 2012

Appl. No.:

13/460796

Inventors:

Huong M. TRUONG - Houston TX, US
Jason W. WHITEMAN - Tomball TX, US
Prill J. PATEL - Houston TX, US

International Classification:

G06F 11/22

US Classification:

714 30, 714E11145

Abstract:

In some examples, a computer system includes a first component associated with a first power domain and a second component associated with a second power domain. The computer system also includes a debug port with a debug port pin shared by a debug operation pin of the first component and a corresponding debug operation pin of the second component. The computer system also includes a switch associated with the debug port pin to selectively isolate the debug operation pin of the first component from leakage current of the corresponding debug operation pin of the second component.