Jayesh G Patel

US Patent:

8554968, Oct 8, 2013

Filed:

Mar 21, 2011

Appl. No.:

13/052388

Inventors:

Peter Z. Onufryk - Flanders NJ, US
Jayesh Patel - San Jose CA, US
Ihab Jaser - San Jose CA, US

Assignee:

PMC-Sierra, Inc. - Sunnyvale CA

International Classification:

G06F 13/24

US Classification:

710260, 710 48, 710269

Abstract:

A nonvolatile memory controller processes a nonvolatile memory command and generates a completion status for the nonvolatile memory command. The nonvolatile memory controller transmits the completion status to a host processing unit for storage in a completion queue of the host processing unit. An interrupt manager in the nonvolatile memory controller determines the completion queue contains an unprocessed completion status and generates an interrupt message packet. The nonvolatile memory controller transmits the interrupt message packet to the host processing unit for triggering an interrupt in the host processing unit and alerting the host processing unit to the unprocessed completion status.

US Patent:

8588228, Nov 19, 2013

Filed:

Mar 18, 2011

Appl. No.:

13/052008

Inventors:

Peter Z. Onufryk - Flanders NJ, US
Jayesh Patel - San Jose CA, US
Ihab Jaser - San Jose CA, US
Ganesh T. Seshan - Fremont CA, US

Assignee:

PMC-Sierra US, Inc. - Sunnyvale CA

International Classification:

H04L 12/28

US Classification:

370389, 710316

Abstract:

A nonvolatile memory controller includes a host controller interface, processors, a message networks and a data network. The host controller interface includes a command fetch module, command assembly buffers, and a command dispatch module. The command fetch module retrieves nonvolatile memory commands from a host processing unit. The command assembly buffers store the nonvolatile memory commands retrieved from the host processing unit. The command dispatch module generates request message packets including the nonvolatile memory commands. The message network routes the request message packets to the processors. The processors process the nonvolatile memory commands in the request message packets for controlling operation of the nonvolatile memory controller.

US Patent:

D4109120, Jun 15, 1999

Filed:

Feb 27, 1998

Appl. No.:

D/084315

Inventors:

Brian M. Bloch - Perth Amboy NJ
Vincent M. Byrne - Mesquite TX
Jayesh R. Patel - Garland TX
Kevin G. Shaw - Garland TX

Assignee:

Lucent Technologies Inc. - Murray Hill NJ

International Classification:

1402

US Classification:

D14115

US Patent:

20210056124, Feb 25, 2021

Filed:

Aug 22, 2019

Appl. No.:

16/548191

Inventors:

- Roseland NJ, US
Deepak Kaushal - Roseland NJ, US
Zhitao Xu - Roseland NJ, US
Muhammad Nuri - Roseland NJ, US
Eliezer Madeira de Campos - Porto Alegre, BR
Lili Zhang - Roseland NJ, US
Kushal Gohil - Roseland NJ, US
Supraja Kanapala - Roseland NJ, US
Jayesh Patel - Roseland NJ, US
Manish Patel - Roseland NJ, US
Tushar Phondge - Roseland NJ, US
Vincent Civetta - Roseland NJ, US
Frank Villavicencio - Roseland NJ, US

International Classification:

G06F 16/27
G06F 16/23
G06F 16/25

Abstract:

Synchronizing data across databases comprising generating a synchronization event in response to a change in source data in a source database. The synchronization event is published as a message in a source database internal queue. The message is then published in a message broker. Sink data in a sink database is synchronized according to the message in the message broker to match the change in source data in the source database.