Jeffrey T Barr

US Patent:

20040195669, Oct 7, 2004

Filed:

Dec 5, 2003

Appl. No.:

10/729734

Inventors:

Wendy Wilkins - Eau Claire WI, US
Kevin Hampton - Eau Claire WI, US
Jeffrey Barr - Bloomer WI, US

International Classification:

H01L021/44
H01L023/053

US Classification:

257/698000, 257/700000, 257/737000, 438/613000

Abstract:

An integrated circuit apparatus for facilitating the interconnection of one or more circuitry manufacture includes a carrier substrate defining a top surface and a bottom surface. Carrier substrate vias penetrate from the top surface to the bottom surface of the carrier substrate and define interior via surfaces. Carrier substrate cavities are formed on the top and/or bottom surfaces of the carrier substrate and define interior cavity surfaces. The carrier substrate is configured to receive one or more circuitry manufacture on the top and bottom surfaces, the interior via surfaces, and the interior cavity surfaces.