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ISLN:
908138867
Admitted:
1990
University:
Dickinson College, B.A., 1986
Law School:
College of William & Mary, Marshall-Wythe School of Law, J.D., 1990
Kevin M. Conley - San Jose CA John S. Mangan - Santa Cruz CA Jeffrey G. Craig - Fremont CA
Assignee:
Sandisk Corporation - Sunnyvale CA
International Classification:
G11C 1604
US Classification:
36518511, 36518904, 36518509
Abstract:
A non-volatile memory system is formed of floating gate memory cells arranged in blocks as the smallest unit of memory cells that are erasable together. The system includes a number of features that may be implemented individually or in various cooperative combinations. One feature is the storage in separate blocks of the characteristics of a large number of blocks of cells in which user data is stored. These characteristics for user data blocks being accessed may, during operation of the memory system by its controller, be stored in a random access memory for ease of access and updating. According to another feature, multiple sectors of user data are stored at one time by alternately streaming chunks of data from the sectors to multiple memory blocks. Bytes of data in the stream may be shifted to avoid defective locations in the memory such as bad columns. Error correction codes may also be generated from the streaming data with a single generation circuit for the multiple sectors of data.
Flash Eeprom System With Simultaneous Multiple Data Sector Programming And Storage Of Physical Block Characteristics In Other Designated Blocks
Kevin M. Conley - San Jose CA John S. Mangan - Santa Cruz CA Jeffrey G. Craig - Fremont CA
Assignee:
SanDisk Corporation - Sunnyvale CA
International Classification:
G11C 1604
US Classification:
36518511, 36518904, 36518509
Abstract:
A non-volatile memory system is formed of floating gate memory cells arranged in blocks as the smallest unit of memory cells that are erasable together. The system includes a number of features that may be implemented individually or in various cooperative combinations. One feature is the storage in separate blocks of the characteristics of a large number of blocks of cells in which user data is stored. These characteristics for user data blocks being accessed may, during operation of the memory system by its controller, be stored in a random access memory for ease of access and updating. According to another feature, multiple sectors of user data are stored at one time by alternately streaming chunks of data from the sectors to multiple memory blocks. Bytes of data in the stream may be shifted to avoid defective locations in the memory such as bad columns. Error correction codes may also be generated from the streaming data with a single generation circuit for the multiple sectors of data.
Flash Eeprom System With Simultaneous Multiple Data Sector Programming And Storage Of Physical Block Characteristics In Other Designated Blocks
Kevin M. Conley - San Jose CA John S. Mangan - Santa Cruz CA Jeffrey G. Craig - Fremont CA
Assignee:
SanDisk Corporation - Sunnyvale CA
International Classification:
G11C 1604
US Classification:
36518511, 36518509, 36518904
Abstract:
A non-volatile memory system is formed of floating gate memory cells arranged in blocks as the smallest unit of memory cells that are erasable together. The system includes a number of features that may be implemented individually or in various cooperative combinations. One feature is the storage in separate blocks of the characteristics of a large number of blocks of cells in which user data is stored. These characteristics for user data blocks being accessed may, during operation of the memory system by its controller, be stored in a random access memory for ease of access and updating. According to another feature, multiple sectors of user data are stored at one time by alternately streaming chunks of data from the sectors to multiple memory blocks. Bytes of data in the stream may be shifted to avoid defective locations in the memory such as bad columns. Error correction codes may also be generated from the streaming data with a single generation circuit for the multiple sectors of data.
Flash Eeprom System With Simultaneous Multiple Data Sector Programming And Storage Of Physical Block Characteristics In Other Designated Blocks
Kevin M. Conley - San Jose CA, US John S. Mangan - Santa Cruz CA, US Jeffrey G. Craig - Fremont CA, US
Assignee:
SanDisk Corporation - Sunnyvale CA
International Classification:
G11C 16/04
US Classification:
36518511, 36518904, 36518509
Abstract:
A non-volatile memory system is formed of floating gate memory cells arranged in blocks as the smallest unit of memory cells that are erasable together. The system includes a number of features that may be implemented individually or in various cooperative combinations. One feature is the storage in separate blocks of the characteristics of a large number of blocks of cells in which user data is stored. These characteristics for user data blocks being accessed may, during operation of the memory system by its controller, be stored in a random access memory for ease of access and updating. According to another feature, multiple sectors of user data are stored at one time by alternately streaming chunks of data from the sectors to multiple memory blocks. Bytes of data in the stream may be shifted to avoid defective locations in the memory such as bad columns. Error correction codes may also be generated from the streaming data with a single generation circuit for the multiple sectors of data.
Flash Eeprom System With Simultaneous Multiple Data Sector Programming And Storage Of Physical Block Characteristics In Other Designated Blocks
Kevin M. Conley - San Jose CA, US John S. Mangan - Santa Cruz CA, US Jeffrey G. Craig - Fremont CA, US
Assignee:
SanDisk Corporation - Milpitas CA
International Classification:
G11C 16/04
US Classification:
36518511, 36518904, 36518509, 365200, 36518529
Abstract:
A non-volatile memory system is formed of floating gate memory cells arranged in blocks as the smallest unit of memory cells that are erasable together. The system includes a number of features that may be implemented individually or in various cooperative combinations. One feature is the storage in separate blocks of the characteristics of a large number of blocks of cells in which user data is stored. These characteristics for user data blocks being accessed may, during operation of the memory system by its controller, be stored in a random access memory for ease of access and updating. According to another feature, multiple sectors of user data are stored at one time by alternately streaming chunks of data from the sectors to multiple memory blocks. Bytes of data in the stream may be shifted to avoid defective locations in the memory such as bad columns. Error correction codes may also be generated from the streaming data with a single generation circuit for the multiple sectors of data.
Daniel L. Auclair - Mountain View CA, US Jeffrey Craig - Fremont CA, US John S. Mangan - Santa Cruz CA, US Robert D. Norman - San Jose CA, US Daniel C. Guterman - Fremont CA, US Sanjay Mehrotra - Milpitas CA, US
Assignee:
SanDisk Corporation - Milpitas CA
International Classification:
G11C 29/00
US Classification:
714721
Abstract:
Soft errors occur during normal use of a solid-state memory such as EEPROM or Flash EEPROM. A soft error results from the programmed threshold voltage of a memory cell being drifted from its originally intended level. The error is initially not readily detected during normal read until the cumulative drift becomes so severe that it develops into a hard error. Data could be lost if enough of these hard errors swamps available error correction codes in the memory. A memory device and techniques therefor are capable of detecting these drifts and substantially maintaining the threshold voltage of each memory cell to its intended level throughout the use of the memory device, thereby resisting the development of soft errors into hard errors.
Flash Eeprom System With Simultaneous Multiple Data Sector Programming And Storage Of Physical Block Characteristics In Other Designated Blocks
Kevin M. Conley - San Jose CA, US John S. Mangan - Santa Cruz CA, US Jeffrey G. Craig - Fremont CA, US
Assignee:
Sandisk Corporation - Milpitas CA
International Classification:
G11C 16/04
US Classification:
36518511, 36518904, 365200, 36518509, 36518529
Abstract:
A non-volatile memory system is formed of floating gate memory cells arranged in blocks as the smallest unit of memory cells that are erasable together. The system includes a number of features that may be implemented individually or in various cooperative combinations. One feature is the storage in separate blocks of the characteristics of a large number of blocks of cells in which user data is stored. These characteristics for user data blocks being accessed may, during operation of the memory system by its controller, be stored in a random access memory for ease of access and updating. According to another feature, multiple sectors of user data are stored at one time by alternately streaming chunks of data from the sectors to multiple memory blocks. Bytes of data in the stream may be shifted to avoid defective locations in the memory such as bad columns. Error correction codes may also be generated from the streaming data with a single generation circuit for the multiple sectors of data.
Daniel L. Auclair - Mountain View CA, US Jeffrey Craig - Fremont CA, US John S. Mangan - Santa Cruz CA, US Robert D. Norman - San Jose CA, US Daniel C. Guterman - Fremont CA, US Sanjay Mehrotra - Milpitas CA, US
Assignee:
SanDisk Corporation - Milpitas CA
International Classification:
G11C 11/34
US Classification:
36518522, 3541852, 35418907
Abstract:
Soft errors occur during normal use of a solid-state memory such as EEPROM or Flash EEPROM. A soft error results from the programmed threshold voltage of a memory cell being drifted from its originally intended level. The error is initially not readily detected during normal read until the cumulative drift becomes so severe that it develops into a hard error. Data could be lost if enough of these hard errors swamps available error correction codes in the memory. A memory device and techniques therefor are capable of detecting these drifts and substantially maintaining the threshold voltage of each memory cell to its intended level throughout the use of the memory device, thereby resisting the development of soft errors into hard errors.
Dr. Craig graduated from the University of Wisconsin Medical School in 1996. He works in Merrill, WI and 1 other location and specializes in Emergency Medicine. Dr. Craig is affiliated with Flambeau Hospital, Ministry Good Samaritan Health Center and Ministry St Josephs Hospital.
Dr. Craig graduated from the University of Louisville School of Medicine in 2004. He works in Oklahoma City, OK and specializes in Neurology, Vascular and Neurology.
Dr. Craig graduated from the University of Arkansas College of Medicine at Little Rock in 1992. He works in Conway, AR and specializes in Pediatrics and Adolescent Medicine. Dr. Craig is affiliated with Conway Regional Medical Center.
Dr. Craig graduated from the University of Oklahoma College of Medicine at Oklahoma City in 2009. He works in Tulsa, OK and specializes in Internal Medicine. Dr. Craig is affiliated with St John Medical Center.