Jeffrey D Sheldon

US Patent:

20180307829, Oct 25, 2018

Filed:

Nov 21, 2017

Appl. No.:

15/818783

Inventors:

- Palo Alto CA, US
DOUG COVELLI - Cambridge MA, US
JEFFREY W. SHELDON - Palo Alto CA, US
FREDERICK JOSEPH JACOBS - Palo Alto CA, US
DAVID DUNN - BELLEVUE WA, US

International Classification:

G06F 21/53
G06F 3/06
G06F 9/455

Abstract:

Techniques for securely supporting a global view of system memory in a physical/virtual computer system comprising a plurality of physical/virtual CPUs are provided. In one set of embodiments, the physical/virtual computer system can receive an interrupt indicating that a first physical/virtual CPU should enter a privileged CPU operating mode. The physical/virtual computer system can further determine that none of the plurality of physical/virtual CPUs are currently in the privileged CPU operating mode. In response to this determination, the physical/virtual computer system can modify the global view of system memory to include a special memory region comprising program code to be executed while in the privileged CPU operating mode; communicate, to the other physical/virtual CPUs, a signal to enter a stop state in which execution is halted but interrupts are accepted for entering the privileged CPU operating mode; and cause the first physical/virtual CPU to enter the privileged CPU operating mode.

US Patent:

20140108860, Apr 17, 2014

Filed:

Oct 9, 2013

Appl. No.:

14/050322

Inventors:

- Palo Alto CA, US
Michael COHEN - Boston MA, US
Jeffrey W. SHELDON - Mountain View CA, US

Assignee:

VMware, Inc. - Palo Alto CA

International Classification:

G06F 11/14

US Classification:

714 10

Abstract:

A system and method for reducing the likelihood of concurrency errors by identifying vulnerable segments of computer code and stalling other virtual machine threads of execution. According to one embodiment of the present invention, the vulnerable segment is identified at runtime, for example in a dynamic translator. According to another embodiment of the present invention, the vulnerable segment is identified ahead of time, for example in a static translator. According to yet another embodiment of the present invention, the vulnerable segment is identified in the binary translator of a virtual machine monitor.