Jeffrey L Swanson

US Patent:

8539260, Sep 17, 2013

Filed:

Apr 5, 2010

Appl. No.:

12/798478

Inventors:

Selim Bilgin - Hillsboro OR, US
Lily P. Looi - Portland OR, US
Jeffrey C. Swanson - Sunnyvale CA, US

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

G06F 1/26
G06F 1/32
G06F 15/16

US Classification:

713300, 713310, 713320, 713323, 713324, 709237

Abstract:

To address the need for power management, the following facilitates maintaining power states in an efficient manner based at least in part on managing packets at different layers of an input/output interface that supports multiple layers. One specific example prevents a destructive event for link layer control logic because packets and information might have been lost or dropped due to a hang condition and/or a dropped packet. In yet another example of power management, this facilitates a low power platform state by preventing the loss of packets or data upon exiting a platform power state upon initiation of a link reset condition by preventing certain types of packets from reaching link layer controller logic.

US Patent:

20130336336, Dec 19, 2013

Filed:

Aug 20, 2013

Appl. No.:

13/971729

Inventors:

Selim Bilgin - Hillsboro OR, US
Lily P. Looi - Portland OR, US
Jeffrey C. Swanson - Sunnyvale CA, US

International Classification:

H04L 12/12

US Classification:

370465

Abstract:

To address the need for power management, the following facilitates maintaining power states in an efficient manner based at least in part on managing packets at different layers of an input/output interface that supports multiple layers. One specific example prevents a destructive event for link layer control logic because packets and information might have been lost or dropped due to a hang condition and/or a dropped packet. In yet another example of power management, this facilitates a low power platform state by preventing the loss of packets or data upon exiting a platform power state upon initiation of a link reset condition by preventing certain types of packets from reaching link layer controller logic.

US Patent:

20140112339, Apr 24, 2014

Filed:

Oct 22, 2013

Appl. No.:

14/060191

Inventors:

Robert J. Safranek - Portland OR, US
Robert G. Blankenship - Tacoma WA, US
Venkatraman Iyer - Austin TX, US
Jeff Willey - Timnath CO, US
Robert Beers - Hillsboro OR, US
Darren S. Jue - Sunnyvale CA, US
Arvind A. Kumar - Palo Alto CA, US
Debendra Das Sharma - Saratoga CA, US
Jeffrey C. Swanson - Sunnyvale CA, US
Bahaa Fahim - San Jose CA, US
Vedaraman Geetha - Fremont CA, US
Aaron T. Spink - San Francisco CA, US
Fulvio Spagna - San Jose CA, US
Rahul C. Shah - San Francisco CA, US
Sitaraman V. Iyer - Santa Clara CA, US
Bill Harry Nale - Livermore CA, US
Abhishek Das - Portland OR, US
Simon P. Johnson - Beaverton OR, US
Yuvraj S. Dhillon - Hillsboro OR, US
Yen-Cheng Liu - Portland OR, US
Raj K. Ramanujan - Federal Way WA, US
Robert A. Maddox - Columbia SC, US
Herbert H. Hum - Portland OR, US
Ashish Gupta - Chandler AZ, US

International Classification:

H04L 12/741

US Classification:

370389

Abstract:

A physical layer (PHY) is coupled to a serial, differential link that is to include a number of lanes. The PHY includes a transmitter and a receiver to be coupled to each lane of the number of lanes. The transmitter coupled to each lane is configured to embed a clock with data to be transmitted over the lane, and the PHY periodically issues a blocking link state (BLS) request to cause an agent to enter a BLS to hold off link layer flit transmission for a duration. The PHY utilizes the serial, differential link during the duration for a PHY associated task selected from a group including an in-band reset, an entry into low power state, and an entry into partial width state