Jeremy Simon Nabeth

age ~39

from Austin, TX

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Also known as:
  • Jeremy S Nabeth
  • Jeremy S Chong
Phone and address:
141 Navigator Dr, Austin, TX 78717
Related to:
Connected to:

Jeremy Nabeth Phones & Addresses

  • 141 Navigator Dr, Austin, TX 78717
  • Pflugerville, TX
  • Toledo, OH
  • West Lafayette, IN
  • W Lafayette, IN

Work

  • Company:
    Samsung austin semiconductor
    Jan 2011
  • Position:
    Process engineer

Education

  • Degree:
    Master of Science
  • School / High School:
    Purdue University
    2008 to 2010
  • Specialities:
    Fluid and Structural Mechanics

Skills

Cfd • Finite Element Analysis • Fluid Mechanics • Matlab • Engineering • Semiconductor Manufacturing • Heat Transfer • Fortran • Thermodynamics • Numerical Analysis • Semiconductors • Labview • Ansys • Design of Experiments • Aerodynamics • Simulations • Dynamics • Python

Languages

French • English

Ranks

  • Certificate:
    Lean Bronze

Industries

Semiconductors

Resumes

Jeremy Nabeth Photo 1

5D Senior Applications Development Engineer

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Location:
7 Technology Dr, Livermore, CA 94551
Industry:
Semiconductors
Work:
Samsung Austin Semiconductor since Jan 2011
Process Engineer
Oak Ridge National Laboratory May 2010 - Jul 2010
Intern
Purdue University Aug 2008 - May 2010
Graduate Research Assistant
Junior Engineering Company of ENSTA Bretagne Sep 2007 - Jun 2008
President
CEMEX National Technical Center Jun 2007 - Jul 2007
Engineering Technician Intern
Education:
Purdue University 2008 - 2010
Master of Science, Fluid and Structural Mechanics ENSTA Bretagne 2006 - 2008
Bachelor of Science, Mechanical Engineering
Skills:
Cfd
Finite Element Analysis
Fluid Mechanics
Matlab
Engineering
Semiconductor Manufacturing
Heat Transfer
Fortran
Thermodynamics
Numerical Analysis
Semiconductors
Labview
Ansys
Design of Experiments
Aerodynamics
Simulations
Dynamics
Python
Languages:
French
English
Certifications:
Lean Bronze
Certified Scrum Product Owner® (Cspo®)
Certified Scrummaster (Csm)
Samsung

Us Patents

  • Overlay Variance Stabilization Methods And Systems

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  • US Patent:
    20170219928, Aug 3, 2017
  • Filed:
    Sep 2, 2016
  • Appl. No.:
    15/256410
  • Inventors:
    - Milpitas CA, US
    William Pierson - Austin TX, US
    Jeremy Nabeth - Austin TX, US
    Sanghuck Jeon - Gyeonggi-do, KR
    Onur N. Demirer - Austin TX, US
    Miguel Garcia-Medina - Austin TX, US
    Soujanya Vuppala - Fremont CA, US
  • International Classification:
    G03F 7/20
    G06F 17/50
  • Abstract:
    Methods and systems for providing overlay corrections are provided. A method may include: selecting an overlay model configured to perform overlay modeling for a wafer; obtaining a first set of modeled results from the overlay model, the first set of modeled results indicating adjustments applicable to a plurality of term coefficients of the overlay model; calculating a significance matrix indicating the significance of the plurality of term coefficients; identifying at least one less significant term coefficient among the plurality of term coefficients based on the calculated significance matrix; obtaining a second set of modeled results from the overlay model, the second set of modeled results indicating adjustments applicable to the plurality of term coefficients except for the identified at least one less significant term coefficient; and providing the second set of modeled results to facilitate overlay correction.
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