Jesse F Jenkins

US Patent:

61725196, Jan 9, 2001

Filed:

Dec 18, 1997

Appl. No.:

8/993596

Inventors:

David Chiang - Saratoga CA
Jesse H. Jenkins - Danville CA
Robert A. Olah - Palo Alto CA

Assignee:

Xilinx, Inc. - San Jose CA

International Classification:

H03K 19173

US Classification:

326 38

Abstract:

A method of operating a pin of an in-system programmable logic device (ISPLD) which includes the steps of (1) applying a predetermined voltage to the pin when the ISPLD is in a set-up mode, and (2) maintaining the last voltage applied to the pin when the ISPLD is in a normal operating mode. The ISPLD is in the set-up mode when the logic of the ISPLD has not yet been configured, or is being configured. The ISPLD is in the normal operating mode after the logic of the ISPLD has been configured. A particular ISPLD includes a pin and a logic gate having a first input terminal coupled to the pin, a second input terminal coupled to receive a control signal, and an output terminal coupled to the pin. When the ISPLD is in the set-up mode, the control signal causes the logic gate to apply a predetermined voltage to the pin. When the ISPLD is in the normal operating mode, the control signal causes the logic gate to maintain the last applied voltage on the pin.

US Patent:

55635296, Oct 8, 1996

Filed:

May 26, 1995

Appl. No.:

8/452448

Inventors:

Jeffrey H. Seltzer - Los Gatos CA
Jesse H. Jenkins - Danville CA
Sholeh Diba - Los Gatos CA

Assignee:

Xilinx, Inc. - San Jose CA

International Classification:

H03K 1900

US Classification:

326 39

Abstract:

A macrocell for flexibly routing product terms from an AND array to output terminals of a programmable logic device. The macrocell allows a variable number of product terms to be retained by the macrocell, and a variable number of product terms to be exported to a second macrocell. The direction in which the product terms are exported can be controlled. The macrocell further allows a variable number of product terms to be received from a third macrocell and routed either to the output terminal of the first macrocell or to the second macrocell in combination with those product terms exported from the first macrocell. Methods for routing product terms using macrocells within a programmable logic device are also provided.