Ji A Zhang

US Patent:

6335990, Jan 1, 2002

Filed:

Dec 4, 1997

Appl. No.:

08/985377

Inventors:

Wen H. Chen - Sunnyvale CA
Ji Zhang - San Jose CA
Fang Wu - San Jose CA

Assignee:

Cisco Technology, Inc. - San Jose CA

International Classification:

G06T 510

US Classification:

382261, 382265, 382275, 348607, 348608, 348618, 348620, 37524029

Abstract:

A filter that filters in the spatial and temporal domain in a single step with filtering coefficients that can be varied depending upon the complexity of the video and the motion between the adjacent frames comprises: a IIR filter, a threshold unit, and a coefficient register. The IIR filter and threshold unit are coupled to receive video data. The IIR filter is also coupled to the coefficient register and the threshold unit. The IIR filter receives coefficients, a, from the coefficient register and uses them to filter the video data received. The IIR filter filters the data in the vertical, horizontal and temporal dimensions in a single step. The filtered data output by the IIR filter is sent to the threshold unit. The threshold unit compares the absolute value of the difference between the filtered data and the raw video data to a threshold value from the coefficient register, and then outputs either the raw video data or the filtered data. The present invention is advantageous because it preserves significant edges in video sequence; it preserves motion changes in video sequences; it reduces noise; and it uses minimal memory storage and introduces minimal processing delay.

US Patent:

6445314, Sep 3, 2002

Filed:

Mar 1, 2000

Appl. No.:

09/516916

Inventors:

Ji Zhang - San Jose CA
Fang Wu - San Jose CA

Assignee:

Cisco Technology Inc. - San Jose CA

International Classification:

H03M 700

US Classification:

341 67, 341 65

Abstract:

A system for decoding variable length codes comprises a window buffer, a unique variable length code look-up table and a decoder. The window buffer is coupled to receive a bit stream and provides a window output having the same number of bits in the longest variable length code. The output of the window buffer is coupled to address the variable length code look-up table. The look-up table has entries pre-calculated based on the variable length code book and is pre-stored in the system. The window buffer can have a size of any number of bits from X to Y where X is the number of bits in the longest variable length code and Y is a number greater than X. The output of the variable length code look-up table is provided to the decoder. The output of the variable length code look-up table includes the code specified by the bits, and a number of bits that the window buffer should be incremented. This number is in turn used by the decoder to increment the window buffer.

US Patent:

6483543, Nov 19, 2002

Filed:

Feb 3, 1999

Appl. No.:

09/244326

Inventors:

Ji Zhang - San Jose CA
Scott Stovall - Bonny Doon CA
Fang Wu - San Jose CA
Yitong Tse - San Jose CA

Assignee:

Cisco Technology, Inc. - San Jose CA

International Classification:

H04N 718

US Classification:

348390, 37524008

Abstract:

A system for transcoding multiple channels of compressed video streams using a self contained data unit such as an autonomous frame includes an autonomous frame processing unit having an autonomous frame generator and an autonomous frame recoder. The autonomous frame generator receives video data and divides it into a series of autonomous frames. Each autonomous frame preferably comprises 1) a frame header including all header information from the original video data plus enough additional information to allow the frame to be recoded using pre-defined autonomous frame structure, and 2) a frame payload including the original video data information. The autonomous frame recoder process the autonomous frames including extracting processing parameters, extracting the video data and setting up or initializing the recoder to process the extracted video data. The autonomous frame recoder preferably further comprises a parser coupled to an initialization unit and a recoder. The present invention also includes a method for processing video data including the steps of: receiving a video bitstream, storing recoding information, dividing the video bitstream into a plurality of autonomous frames each frame including a portion of the video bitstream and recoding information, outputting the plurality of autonomous frames, receiving the plurality of autonomous frames, extracting processing information from the autonomous frame, extracting video data from the autonomous frame, setting the recoding according to the processing information and recoding the extracted video data.

US Patent:

6611624, Aug 26, 2003

Filed:

Oct 15, 1998

Appl. No.:

09/173708

Inventors:

Ji Zhang - San Jose CA
Yi Tong Tse - San Jose CA

Assignee:

Cisco Systems, Inc. - San Jose CA

International Classification:

G06K 936

US Classification:

382232, 37524026, 370498

Abstract:

A system for performing frame accurate bitstream splicing includes a first pre-buffer, a second pre-buffer, a seamless splicer, and a post-buffer. The system also includes a time stamp extractor, a time stamp adjuster, and a time stamp replacer for timing correction. The first and second pre-buffers are input buffers to the seamless splicer, and the post-buffer is coupled to the output of the seamless splicer. The seamless splicer receives the two streams via the first and second pre-buffers and produces a single spliced bitstream at its output in response to the cue tone signal. The seamless splicer provides the first bitstream, then re-encodes portions of the first and second bit streams proximate the splicing points (both the exit point and the entry point), and then switches to providing a second bitstream. The seamless splicer also performs rate conversion on the second stream as necessary to ensure decoder buffer compliance for the spliced bitstream. The present invention also includes a method for performing bitstream splicing comprising the steps of: determining a splicing point switching between a first bitstream and a second bitstream, determining whether the second bitstream has the same bit rate as the first bitstream, converting the rate of the second bitstream if it is not the same as the bit rate of the first bitstream, and re-encoding picture proximate the splicing point.

US Patent:

6751259, Jun 15, 2004

Filed:

Oct 11, 2002

Appl. No.:

10/270852

Inventors:

Ji Zhang - San Jose CA
Scott Stovall - Bonny Doon CA
Fang Wu - San Jose CA
Yitong Tse - San Jose CA

Assignee:

Cisco Technology, Inc. - San Jose CA

International Classification:

H04N 718

US Classification:

37524026, 37524028

Abstract:

A system for transcoding multiple channels of compressed video streams using a self contained data unit such as an autonomous frame includes an autonomous frame processing unit having an autonomous frame generator and an autonomous frame recoder. The autonomous frame generator receives video data and divides it into a series of autonomous frames. Each autonomous frame preferably comprises 1) a frame header including all header information from the original video data plus enough additional information to allow the frame to be recoded using pre-defined autonomous frame structure, and 2) a frame payload including the original video data information. The autonomous frame recoder process the autonomous frames including extracting processing parameters, extracting the video data and setting up or initializing the recoder to process the extracted video data. The autonomous frame recoder preferably further comprises a parser coupled to an initialization unit and a recoder. The present invention also includes a method for processing video data including the steps of: receiving a video bitstream, storing recoding information, dividing the video bitstream into a plurality of autonomous frames each frame including a portion of the video bitstream and recoding information, outputting the plurality of autonomous frames, receiving the plurality of autonomous frames, extracting processing information from the autonomous frame, extracting video data from the autonomous frame, setting the recoding according to the processing information and recoding the extracted video data.

US Patent:

6754082, Jun 22, 2004

Filed:

Nov 7, 2002

Appl. No.:

10/290013

Inventors:

Jiangang Ding - San Jose CA
Ji Zhang - San Jose CA
Hain Ching Liu - Fremont CA

Assignee:

Exavio, Inc. - Santa Clara CA

International Classification:

G06F 116

US Classification:

361727, 361685, 361724, 3122231, 3122232

Abstract:

A data storage system ( ) includes multiple storage devices arranged in an array. A column in the array includes storage devices ( ) mounted on a tray ( ). The storage devices ( ) and the tray ( ) form an air channel ( ) for efficient heat dissipation. The data storage system ( ) may include multiple columns inserted in multiple slots of a chassis ( ), thereby forming a memory board.

US Patent:

6754765, Jun 22, 2004

Filed:

May 14, 2001

Appl. No.:

09/855919

Inventors:

Chao-I Chang - San Jose CA
Ji Yun Zhang - Fremont CA

Assignee:

Integrated Memory Logic, Inc. - Campbell CA

International Classification:

G06F 1200

US Classification:

711103, 711157, 711164

Abstract:

A flash memory controller with a volatile program and data memory is disclosed. The controller loads microcode and data into the program and data memory from a flash memory array upon powerup of the controller. If an error occurs during the download or the microcode does not exist in the flash memory array, then the controller loads microcode and data into the program and data memory from the host computer. In some embodiments of the invention, an initial code is downloaded to the controller so that an evaluation of the configuration of the controller and the flash memory can be communicated to a host computer. The host computer then downloads for storage into the flash memory a tailored microcode and restarts the controller so that the tailored microcode is loaded from the flash memory and executed. In some embodiments, a protection circuit is provided to protect the microcode from accidentally being erased from the flash memory. Additionally, in some embodiments, an interleaved data structure is utilized to minimize wait times during read and write operations to the flash memory.

US Patent:

6795506, Sep 21, 2004

Filed:

Oct 5, 2000

Appl. No.:

09/684623

Inventors:

Ji Zhang - San Jose CA
Humphrey Liu - Fremont CA

Assignee:

Cisco Technology, Inc. - San Jose CA

International Classification:

H04N 712

US Classification:

37524026, 3703951, 3483901

Abstract:

Techniques and mechanisms are provided for scheduling and multiplexing compressed bitstreams. A compressed bitstream includes bit rate information describing the bit rate of video data. The bit rate information is used to improve the scheduling and multiplexing efficiency of compressed bitstreams. Compressed video data can be transmitted over communication channels at bit rates that comply with available channel bandwidth.