Jia Li

US Patent:

6184103, Feb 6, 2001

Filed:

Jun 26, 1998

Appl. No.:

9/105579

Inventors:

Jia Li - San Antonio TX
Yaoxiong Wu - San Antonio TX

Assignee:

Sony Corporation - Tokyo
Sony Electronics Inc. - Park Ridge NJ

International Classification:

H01L 2900

US Classification:

438382

Abstract:

The present invention provides stable and reliable extremely high resistance polysilicon resistors for use as SRAM load elements, and methods for their fabrication. In an embodiment, a resistor element of a semiconductor device includes at least one polysilicon layer, and a silicon nitride layer deposited directly onto this polysilicon layer. The silicon nitride layer prevents contamination of the polysilicon layer during subsequent fabrication process steps. A method of fabricating a polysilicon resistor on a semiconductor substrate is also provided. The method includes the step of depositing a layer of polysilicon on the substrate, followed by depositing a layer of protective material over the polysilicon layer to form a protected polysilicon layer. After deposition of the protective layer, resistors are formed by implanting dopants into the polysilicon layer, and patterning through lithography, and etching the nitride and the polysilicon layer. The step of depositing a layer of protective material can include depositing a layer of silicon nitride.

US Patent:

55853021, Dec 17, 1996

Filed:

Aug 10, 1995

Appl. No.:

8/513404

Inventors:

Jia Li - San Antonio TX

Assignee:

Sony Corporation - Tokyo
Sony Electronics, Inc. - Park Ridge NJ

International Classification:

H01L 2170

US Classification:

437 60

Abstract:

A semiconductor device having tungsten strapped gate electrodes and source/drain regions and a polysilicon resistor. The gate electrodes and the polysilicon resistors are all formed from the same layer of polysilicon by initially coating the deposited polysilicon layer with an insulating layer and subsequently a layer of phosphorus doped silicon glass. The electrodes and resistor areas are formed by selectively etching the silicon glass and the polysilicon. This leaves the electrode polysilicon and the resistor polysilicon coated with the phosphorous doped glass. Spacers are then provided along the electrode and the glass removed only from above the gate electrode polysilicon leaving the resistor coated with the phosphorus doped silicon glass and silicon nitride. Tungsten then can be selectively deposited upon the gate electrode and along adjacent source and drain regions. This takes advantage of the use of selectively deposited tungsten over gate electrodes and at the same time eliminates the need to deposit separate polysilicon layers for the resistors.

US Patent:

59239646, Jul 13, 1999

Filed:

Jan 14, 1997

Appl. No.:

8/783111

Inventors:

Jia Li - San Antonio TX

Assignee:

Sony Corporation - Park Ridge NJ
Sony Electronics Inc. - Park Ridge NJ

International Classification:

H01L 2184

US Classification:

438158

Abstract:

A thin film transistor includes a thin film transistor body above a gate electrode. The thin film transistor body is hydrogenated to prevent the transistor body from apparently capturing and releasing electrons. The transistor body itself is coated with an upper and lower layer of silicon nitride to prevent the trapped hydrogen from migrating out of the transistor body over time. This is formed by depositing a layer of silicon dioxide, then a layer of silicon nitride over the gate electrode, followed by deposition of a polysilicon layer which is then etched to form the transistor body. This is hydrogenated after threshold adjustment implant and source/drain implant and subsequently coated with an upper sealing layer of silicon nitride. This enables the establishment of relatively high lon/loff ratio and improves the reliability of the transistor.

US Patent:

59267011, Jul 20, 1999

Filed:

Jul 3, 1997

Appl. No.:

8/887574

Inventors:

Jia Li - San Antonio TX

Assignee:

Sony Electronics, Inc. - Park Ridge NJ

International Classification:

A01L 2184

US Classification:

438158

Abstract:

An improved method of forming thin film transistors includes depositing a gate dielectric material over a gate electrode and subsequently depositing a polysilicon layer over the dielectric layer. Prior to applying a photoresist material, the polysilicon layer is coated with a protective layer of, for example, silicon oxide. A photoresist material is then applied and the polysilicon layer subsequently selectively etched to form the transistor body. Finally, any masking material is removed. The protective silicon dioxide layer prevents ion contamination of the polysilicon transistor body which can occur during the masking procedure, during the etch procedure, or during subsequent removal of any foreign mask and cleaning procedures. This will, in effect, enable one to prepare transistors with a better-defined threshold.

US Patent:

56271034, May 6, 1997

Filed:

Mar 2, 1995

Appl. No.:

8/397748

Inventors:

Jia Li - San Antonio TX

Assignee:

Sony Corporation - Tokyo
Sony Electronics, Inc. - Park Ridge NJ

International Classification:

H01L 2144
H01L 2148

US Classification:

438158

Abstract:

An interconnect between a conductor and a transistor body above a gate electrode is established by forming a conductor separated and alongside a gate electrode. Both the conductor and the gate electrode are coated with a dielectric material such as silicon dioxide. The silicon dioxide layer is subsequently coated with a thin layer of polysilicon and a contact hole is photolithographically etched through the polysilicon layer and through the silicon dioxide layer to establish a contact hole to said conductor. The polysilicon layer protects the silicon dioxide layer from impurities in the photolithography process. After the photolithographic mask is removed, a second layer of polysilicon is deposited on the first layer of polysilicon, coating the polysilicon layer and partially filling the contact hole, establishing a contact between the combined polysilicon layers and the conductor. The combined polysilicon layer is then further etched to define the transistor body and the connector between the conductor and the transistor body. The channel, the source and drain electrodes, and the connection lines are then doped separately to complete the transistor.

US Patent:

56169337, Apr 1, 1997

Filed:

Oct 16, 1995

Appl. No.:

8/543404

Inventors:

Jia Li - San Antonio TX

Assignee:

Sony Corporation - Tokyo
Sony Electronics Inc. - Park Ridge NJ

International Classification:

H01L 2904
H01L 2358

US Classification:

257 57

Abstract:

A thin film transistor includes a thin film transistor body above a gate electrode. The thin film transistor body is hydrogenated to prevent the transistor body from apparently capturing and releasing electrons. The transistor body itself is coated with an upper and lower layer of silicon nitride to prevent the trapped hydrogen from migrating out of the transistor body over time. This is formed by depositing a layer of silicon dioxide, then a layer of silicon nitride over the gate electrode, followed by deposition of a polysilicon layer which is then etched to form the transistor body. This is hydrogenated after threshold adjustment implant and source/drain implant and subsequently coated with an upper sealing layer of silicon nitride. This enables the establishment of relatively high Ion/Ioff ratio and improves the reliability of the transistor.