Jian Tang from 10420 Peonia Ct, Austin, TX 78733, age 55

Resumes

Design - Senior Principal Sta Engineer

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Location:

Austin, TX

Industry:

Semiconductors

Work:

Nxp Semiconductors
Design - Senior Principal Sta Engineer
Suzhou Powercore Technology Corporation Aug 2015 - Nov 2016
Sta Lead
Austin Design Center Chengdu Hygon Ic Design Aug 2015 - Nov 2016
Technician Lead and Principal Staff
Broadcom Aug 2011 - Aug 2015
Principal Ic Design Engineer
Seagate Technology May 2000 - Aug 2011
Asic Senior Engineer

Education:

Colorado State University 1997 - 1999
Master of Science, Masters, Computer Engineering Institute of Electronics, Chinese Academy of Sciences 1993 - 1996
Master of Science, Masters, Electrical Engineering University of Science and Technology of China 1988 - 1993
Bachelors, Bachelor of Science, Electrical Engineering

Skills:

Asic
Static Timing Analysis
Low Power Design
Integrated Circuit Design
Logic Synthesis
Logic Design
Debugging
Embedded Systems
Verilog
Semiconductors
Soc
C
Ic
Vlsi
Fpga

Jian Tang

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Jian Tang

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Name / Title

Company / Classification

Phones & Addresses

Jian Bin Tang

STRONGSVILLE KUMO, INC

Us Patents

Multi-Instantiation Time Budgeting For Integrated Circuit Design And Manufacturing
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US Patent:

20200311224, Oct 1, 2020
Filed:

Mar 29, 2019
Appl. No.:

16/370008
Inventors:

Hongchang LIANG - Austin TX, US
Jian TANG - Austin TX, US
Yizhou LIN - Santa Clara CA, US
International Classification:

G06F 17/50
G06F 16/901
Abstract:

A method of time budgeting an integrated circuit (IC) including acquiring a graph data structure and clock cycle requirements, where the graph data structure includes at least two identical blocks of a plurality of blocks that correspond to an identical design module. The method acquires internal and external delay values ports of each design module, and sets parameters, which include the internal and external delay values of the at least two identical blocks as equivalent for the identical blocks. The method performs optimization of the parameters of the ports of all of the blocks, and determines whether the optimized parameters of each of the ports satisfy predetermined requirements of the IC. The method outputs a final design of the IC design based on results of the optimization for manufacturing of the IC based on the final design.

Medicine Doctors

Jian J. Tang

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Specialties:

Obstetrics & Gynecology

Work:

Mount Sinai Faculty Practice AssociatesMount Sinai Faculty Practice Associates Obstetrics & Gynecology
5 E 98 St FL 2, New York, NY 10029
2122419393 (phone), 2124231238 (fax)

Education:

Medical School
University of Wisconsin Medical School
Graduated: 1998

Procedures:

Cesarean Section (C-Section)
Colposcopy
Cystoscopy
D & C Dilation and Curettage
Delivery After Previous Caesarean Section
Destruction of Benign/Premalignant Skin Lesions
Myomectomy
Ovarian Surgery
Tubal Surgery
Vaccine Administration
Vaginal Delivery

Conditions:

Abnormal Vaginal Bleeding
Endometriosis
Female Infertility
Follicular Cyst of the Ovary
Genital HPV

Languages:

English
Russian
Spanish

Description:

Dr. Tang graduated from the University of Wisconsin Medical School in 1998. She works in New York, NY and specializes in Obstetrics & Gynecology. Dr. Tang is affiliated with Mount Sinai Medical Center and White Plains Hospital.