Joe Jiajue Chen

US Patent:

6751675, Jun 15, 2004

Filed:

Nov 15, 1999

Appl. No.:

09/441224

Inventors:

Joe J. Chen - San Jose CA

Assignee:

Sun Microsystems, Inc. - Santa Clara CA

International Classification:

G06F 1516

US Classification:

709250, 902 26, 235380

Abstract:

A method for data communication includes receiving a data packet that includes at least one contiguous data item, defining a window that initially includes the beginning of the data items, determining whether the window includes a part of a split data item and processing the contiguous data items when there are no split data items. The method also includes processing all data items occurring before a split data item when a split data item is found, storing the first part of a split data item, moving the window to include both parts of the split data item, appending the stored first part to the second part to create an appended packet and processing the appended packet. An apparatus for data communication includes at least one memory having program instructions and at least one processor configured to use the program instructions to receive a data packet that includes at least one contiguous data item, define a window that initially includes the beginning of the data items, determine whether the window includes a part of a split data item and process the contiguous data items when there are no split data items. The processor is also configured to process all data items occurring before a split data item when a split data item is found, store the first part of a split data item, move the window to include both parts of the split data item, append the stored first part to the second part and process the result.

US Patent:

57404666, Apr 14, 1998

Filed:

Jan 25, 1996

Appl. No.:

8/590387

Inventors:

John S. Geldman - Los Gatos CA
Joe Y. Chen - San Jose CA
Tony J. Yoon - San Jose CA

Assignee:

Cirrus Logic, Inc. - Fremont CA

International Classification:

G06F 900
G06F 1300
G06F 1310
G06F 1312

US Classification:

395825

Abstract:

The invented controller is the combination of: an intelligent interface to a SCSI bus, a multi-port buffer memory manager, a formatter, and a local processor port. With the addition of a few components for the device-level interface, the invented controller along with a buffer RAM, a local processor system, and an optional data separator completes a high performance disk, or other mass storage, controller subsystem. The invention is particularly directed to (1) the dual use of a buffer memory as data buffer storage and for storage of instructions to be executed by a SCSI-protocol processor, (2) the architecture of the interface to the SCSI bus, and (3) the instruction set of the SCSI-protocol processor.

US Patent:

55242685, Jun 4, 1996

Filed:

Jun 26, 1992

Appl. No.:

7/904807

Inventors:

John S. Geldman - Los Gatos CA
Joe Y. Chen - San Jose CA
Tony J. Yoon - San Jose CA

Assignee:

Cirrus Logic, Inc. - Fremont CA

International Classification:

G06F 900
G06F 1300
G06F 1310
G06F 1312

US Classification:

395825

Abstract:

The invented controller is the combination of: an intelligent interface to a SCSI bus, a multi-part buffer memory manager, a formatter, and a local processor port. With the addition of a few components for the device-level interface, the invented controller along with a buffer RAM, a local processor system, and an optional data separator completes a high performance disk, or other mass storage, controller subsystem. The invention is particularly directed to (1) the dual use of a buffer memory as data buffer storage and for storage of instructions to be executed by a SCSI-protocol processor, (2) the architecture of the interface to the SCSI bus, and (3) the instruction set of the SCSI-protocol processor.