Joel F Bartlett

US Patent:

6347290, Feb 12, 2002

Filed:

Jun 24, 1998

Appl. No.:

09/103903

Inventors:

Joel F. Bartlett - Los Altos CA

Assignee:

Compaq Information Technologies Group, L.P. - Houston TX

International Classification:

G09G 300

US Classification:

702150, 345863

Abstract:

A method is provided for processing an input command for a handheld computing device, comprising the steps of: measuring movement of the device over an interval of time with a motion sensor mounted to the device to generate a signal; analyzing the signal measured over the interval of time to determine a gesture command that corresponds to the movement of the device; and processing the gesture command to control the device as of an orientation of the device at the beginning of the interval. In addition to gesture commands, position commands can be input. Position commands are processed by measuring of a series of orientations of the device, analyzing the signal to determine a series of position commands that correspond to the series of orientations of the device, and processing the series of position commands to control the device. The method of processing of gesture commands avoids confusion due to inappropriate processing of orientations falsely determined to be position commands.

US Patent:

6573883, Jun 3, 2003

Filed:

Jun 24, 1998

Appl. No.:

09/103905

Inventors:

Joel F. Bartlett - Los Altos CA

Assignee:

Hewlett Packard Development Company, L.P. - Houston TX

International Classification:

G09G 500

US Classification:

345156, 345157, 345158, 345863, 702150

Abstract:

A method is provided for controlling a handheld computing device through the use of gesture commands. A gesture command corresponds to a pattern of movement of the handheld device that is measured as a function of time F(t), where t is a start time and t is a finish time such that the interval of time is t minus t. The gesture command further corresponds to angular orientations of the handheld device. The method comprises the steps of: measuring movement of the device over an interval of time with a motion sensor mounted to the device, the measuring producing a signal; analyzing the signal measured over the interval of time to determine a gesture command that corresponds to the movement of the device; and processing the gesture command to control the handheld computing device. To enable use of different gesture commands, the method includes a comparison of the signal to a catalog of gesture commands to determine a particular gesture command.

US Patent:

48170917, Mar 28, 1989

Filed:

May 19, 1987

Appl. No.:

7/052094

Inventors:

James A. Katzman - San Jose CA
Joel F. Bartlett - Palo Alto CA
Richard M. Bixler - Sunnyvale CA
William H. Davidow - Atherton CA
John A. Despotakis - Pleasanton CA
Peter J. Graziano - Los Altos CA
Michael D. Green - Los Altos CA
David A. Greig - Cupertino CA
Steven J. Hayashi - Cupertino CA
David R. Mackie - Ben Lomond CA
Dennis L. McEvoy - Scotts Valley CA
James G. Treybig - Sunnyvale CA
Steven W. Wierenga - Sunnyvale CA

Assignee:

Tandem Computers Incorporated - Cupertino CA

International Classification:

G06F 1120

US Classification:

371 9

Abstract:

In a multiprocessor system interconnected by a bus structure that provides communication and information transfers between the processor modules of the system, each processor broadcasts a central message to all the other processors of the system on a periodic basis. A processor module not receiving the control message from a sending processor module will assume the sending processor module has failed, and operate to take over the task of the failed processor module.

US Patent:

44842759, Nov 20, 1984

Filed:

Jun 17, 1983

Appl. No.:

6/504596

Inventors:

James A. Katzman - San Jose CA
Joel F. Bartlett - Palo Alto CA
Richard M. Bixler - Sunnyvale CA
William H. Davidow - Atherton CA
John A. Despotakis - Pleasanton CA
Peter J. Graziano - Los Altos CA
Michael D. Green - Los Altos CA
David A. Greig - Cupertino CA
Steven J. Hayashi - Cupertino CA
David R. Mackie - Ben Lomond CA
Dennis L. McEvoy - Scotts Valley CA
James G. Treybig - Sunnyvale CA
Steven W. Wierenga - Sunnyvale CA

Assignee:

Tandem Computers Incorporated - Cupertino CA

International Classification:

G06F 304
G06F 1300

US Classification:

364200

Abstract:

An input/output system for a processor of the kind in which a processor module has a central processing unit, a memory, an input/output channel, and a plurality of device controllers for controlling the transfer of data between the processor module and the peripheral devices includes a star poll connection in which each device controller is provided with a signalling means for signalling its identity in response to a poll operation, independently of other similarly connected device controllers such that any number of device controllers can be failed or powered off without affecting the polling of the other device controllers. The data lines in an input/output bus are used both to transmit data and to transmit signals to reduce the total number of lines needed to connect the device controllers to the channel in the star poll connection. The system is a fault tolerant system which includes an enable bit in the port of each device controller. The bit can be reset to prevent that device controller from transmitting spurious signals which could interfere with interrupt requests being transmitted to the channel by other device controllers so that a failed device controller can be effectively removed from the system.

US Patent:

48071161, Feb 21, 1989

Filed:

May 18, 1987

Appl. No.:

7/052095

Inventors:

James A. Katzman - San Jose CA
Joel F. Bartlett - Palo Alto CA
Richard M. Bixler - Sunnyvale CA
William H. Davidow - Atherton CA
John A. Despotakis - Pleasanton CA
Peter J. Graziano - Los Altos CA
Michael D. Green - Los Altos CA
David A. Greig - Cupertino CA
Steven J. Hayashi - Cupertino CA
David R. Mackie - Ben Lomond CA
Dennis L. McEvoy - Scotts Valley CA
James G. Treybig - Sunnyvale CA
Steven W. Wierenga - Sunnyvale CA

Assignee:

Tandem Computers Incorporated - Cupertino CA

International Classification:

G06F 1336
G06F 1342

US Classification:

364200

Abstract:

In a multiprocessor system comprising a plurality of individual processor modules interconnected by a bus structure, including a bus controller, for providing communication between the processor modules, a method and apparatus for interprocessor communication includes one of the processor modules sending a request signal to the bus controller to request a transmission; the bus controller polling the processor modules to identify the requesting processor module; the requestor processor module responding to the poll with the identification of the receiver processor module; the bus controller interrogating the receiver processor module to determine its status (i. e. , busy or available); and the bus controller then signaling transmission commencement.

US Patent:

43565506, Oct 26, 1982

Filed:

May 6, 1980

Appl. No.:

6/147305

Inventors:

James A. Katzman - San Jose CA
Joel F. Bartlett - Palo Alto CA
Richard M. Bixler - Sunnyvale CA
William H. Davidow - Atherton CA
John A. Despotakis - Pleasanton CA
Peter J. Graziano - Los Altos CA
Michael D. Green - Los Altos CA
David A. Greig - Cupertino CA
Steven J. Hayashi - Cupertino CA
David R. Mackie - Ben Lomond CA
Dennis L. McEvoy - Scotts Valley CA
James G. Treybig - Sunnyvale CA
Steven W. Wierenga - Sunnyvale CA

Assignee:

Tandem Computers Incorporated - Cupertino CA

International Classification:

G06F 1120

US Classification:

364200

Abstract:

A multiprocessor system, the kind in which two or more separate processor modules are interconnected for two power supplies, provides the entire power for the device controller in the event the other power supply fails. The distributed power supply system permits any processor module or device controller to be powered down so that on-line maintenance can be performed in a power-off condition while the rest of the multiprocessor system is on-line and functional. The multiprocessor system includes a memory system in which the memory of each processor module is divided into four logical address areas--user data, system data, user code and system code. The memory system includes a map which translates logical addresses to physical addresses and which coacts with the multiprocessor system to bring pages from secondary memory into primary main memory as required to implement a virtual memory system. The map also provides a protection function. It provides inherent protection among users in a multiprogramming environment, isolates programs from data and protects system programs from the actions of user program.

US Patent:

46725377, Jun 9, 1987

Filed:

Apr 29, 1985

Appl. No.:

6/727614

Inventors:

James A. Katzman - San Jose CA
Joel F. Bartlett - Palo Alto CA
Richard M. Bixler - Sunnyvale CA
William H. Davidow - Atherton CA
John A. Despotakis - Pleasanton CA
Peter J. Graziano - Los Altos CA
Michael D. Green - Los Altos CA
David A. Greig - Cupertino CA
Steven J. Hayashi - Cupertino CA
David R. Mackie - Ben Lomond CA
Dennis L. McEvoy - Scotts Valley CA
James G. Treybig - Sunnyvale CA
Steven W. Wierenga - Sunnyvale CA

Assignee:

Tandem Computers Incorporated - Cupertino CA

International Classification:

G06F 1110
G06F 1116

US Classification:

364200

Abstract:

A multiprocessor system of the kind in which two or more separate processor modules are interconnected for parallel processing includes interprocessor buses dedicated exclusively to interprocessor communication. The multiprocessor system includes an input/output system having multi-port device controllers and input/output buses connecting each device controller for access by the input/output channels of at least two different processor modules. Each device controller includes logic which insures that only one port is selected for access at a time. An enable latch in each port dynamically disables that port from placing any signals on the related input/output bus in response to a failure of any portion of the device controller, and the enable latch is not responsive to the processor module for re-enabling the port. The device controller controls the transfer of information between a processor module and a peripheral device, and information is gated into a register in a port in a device controller in response to a gating signal generated by a processor module. Parity generation and check means continuously monitor parity for the duration of the gating signal.

US Patent:

52835600, Feb 1, 1994

Filed:

Jun 25, 1991

Appl. No.:

7/720881

Inventors:

Joel F. Bartlett - Los Altos CA

Assignee:

Digital Equipment Corporation - Maynard MA

International Classification:

G09G 514

US Classification:

345113

Abstract:

A computer display control system displays semi-transparent control menus superimposed over other images. The computer system has a central processing unit, a program memory that stores an application or operating system program that generates and displays a first set of images on the display, and a menu generating program that displays a control menu having a list of menu items. The displayed control menu is a stippled image that is partially transparent. When the control menu is superimposed over the first set of images, the first set of images remains visible on the display below the control menu. The menu generating program logically ANDs predefined control menu images with a halftone screen so as to generate a stippled control menu image comprising an array of interleaved transparent and non-transparent pixels. In the preferred embodiment, the menu generating program displays a first version of the control menu when the control menu is unselected and a second version when said control menu is selected. The first version has a higher percentage of transparent pixels than the second version, making the control menu less intrusive during normal use when the menu is unselected, and also making the control menu easier to see distinctly when it is selected.