John M Angiulli

US Patent:

53232933, Jun 21, 1994

Filed:

Dec 18, 1992

Appl. No.:

7/993271

Inventors:

John M. Angiulli - LaGrangeville NY
Arun K. Ghose - Hyde Park NY
Richard R. Konian - Poughkeepsie NY
Samuel R. Levine - Poughkeepsie NY
Kevin P. Moran - Wappingers Falls NY
Vincent C. Vasile - Marlboro NY

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

H05K 720

US Classification:

361699

Abstract:

A low temperature conduction module comprising a cold plate having recesses around the periphery thereof to accommodate memory cubes is disclosed. The recesses accommodating the memory cubes are of such depth and dimension as to enclose the memory cube on all but one side, thereby greatly enhancing the conduction of the heat generated by the memory cube to the cold plate. The memory cube may be surrounded by a material which possesses excellent thermal conductive properties to insure efficient transfer of the heat from the memory cube to the cold plate. The plurality of memory cubes so positioned within the cold plate may be connected by a flexible cable surrounding the cold plate and having branch conductors extending to connect with computer processors enclosed within the same low temperature conduction module.

US Patent:

53652045, Nov 15, 1994

Filed:

Oct 29, 1993

Appl. No.:

8/145364

Inventors:

John M. Angiulli - Lagrangeville NY
Arun K. Ghose - Behala, IN
Richard R. Konian - Poughkeepsie NY
Samuel R. Levine - Poughkeepsie NY
David Meltzer - Wappingers Falls NY
Wen-Yuan Wang - Hopewell Junction NY
Leon L. Wu - Hopewell Junction NY

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

H03B 524
H03K 3354

US Classification:

331 57

Abstract:

A variable frequency digital ring oscillator which can be formed in a small area for use in testing of chips employs a ring oscillator formed of CMOS inverters, transmission gates and capacitors and CMOS logic as a voltage controlled ring oscillator. A wide range of frequency of oscillation is achieved with small number of components. The ring oscillator circuit's oscillator frequency is controlled only by DC voltages, such as may be provided by (but not limited to) a manufacturing chip tester. The output signal of the oscillator swings between Vdd and Vss and does not need additional level translation circuits to drive CMOS logic. The ring oscillator can be composed of an odd number of CMOS inverters connected in cascade to form a loop. We provide a CMOS transmission gate with PMOS and NMOS transistor device inserted between each adjacent inverter and a MOS capacitor connected between the output of each transmission gate and the Vss supply of the ring oscillator circuit (conventionally ground). The gate voltages of the PMOS and NMOS transistors in the transmission gate are different and provide a different DC voltage between Vdd and Vss.

US Patent:

53977475, Mar 14, 1995

Filed:

Nov 2, 1993

Appl. No.:

8/151455

Inventors:

John M. Angiulli - Lagrangeville NY
Eugene S. Kolankowsky - Wappingers Falls NY
Richard R. Konian - Poughkeepsie NY
Leon L. Wu - Hopewell Junction NY

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

H01L 2160

US Classification:

437209

Abstract:

A packaging substrate (10) is populated with memory chip cube(s) (40) and horizontally mounted interconnect chip(s) (19) mounted on the substrate which are joined during assembly using two kinds of lead tin solder alloys to form memory chip cube. One is a high melting point lead tin alloy (HMA), the other is a lower melting point lead tin alloy (LMA). The memory chip pairs (11) of the memory cube are formed by placing functional memory chips over another functional memory chips before they were diced. The chip pads of the individual memory chips and the lead tin pads of the memory chips within the wafer are aligned and the high melting point lead tin solder is reflowed, forming memory chip pairs. The memory cube (42) is formed by joining the memory chip pairs together in a boat (30) with a silicon bar (41) maintaining spacing during manufacture. The memory chip cube (42) as well as the supporting chips are then placed and joined to the packaging substrate.

US Patent:

53629868, Nov 8, 1994

Filed:

Aug 19, 1993

Appl. No.:

8/109230

Inventors:

John M. Angiulli - Lagrangeville NY
Eugene S. Kolankowsky - Wappingers Falls NY
Richard R. Konian - Poughkeepsie NY
Leon L. Wu - Hopewell Junction NY

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

H01L 23498
H01L 23538

US Classification:

257723

Abstract:

A packaging substrate (10) is populated with memory chip cube(s) (40) and horizontally mounted interconnect chip(s) (19)mounted on the substrate which are joined during assembly using two kinds of lead tin solder alloys to form the memory chip cube. One is a high melting point lead tin alloy (HMA), another is a lower melting point lead tin alloy (LMA). The memory chip pairs (11) of the memory cube are formed by placing functional memory chips over other functional memory chips before they were diced. The chip pads of the individual memory chips and the lead tin pads of the memory chips within the wafer are aligned and the high melting point lead tin solder is reflowed, forming memory chip pairs.