John Mark Anthony

US Patent:

6462931, Oct 8, 2002

Filed:

Oct 23, 1997

Appl. No.:

08/956407

Inventors:

Shaoping Tang - Plano TX
John Mark Anthony - Richardson TX
Scott Summerfelt - Dallas TX

Assignee:

Texas Instruments Incorporated - Dallas TX

International Classification:

H01G 4008

US Classification:

361305, 361311, 257295, 257303, 257306

Abstract:

A capacitor ( ) with a high dielectric constant oxide dielectric ( ) plus Ir- or Ir and Rh bond over the oxygen site in Barium strontium titanate (BST) dielectric to achieve the high Schottky barrier, and very thin layers of Ir or Rh with conductive oxide backing layers ( ) provide oxygen depletion deterrence. Rh-containing capacitor plates ( ) yielding high Schottky barrier interfaces.

US Patent:

6613698, Sep 2, 2003

Filed:

May 17, 2001

Appl. No.:

09/859907

Inventors:

Glen D. Wilk - Dallas TX
John Mark Anthony - McKinney TX
Yi Wei - Dallas TX
Robert M. Wallace - Richardson TX

Assignee:

Texas Instruments Incorporated - Dallas TX

International Classification:

H01L 21318

US Classification:

438775, 438791, 438762, 438769

Abstract:

A method for forming a thermal silicon nitride on a semiconductor substrate is disclosed. This method allows formation of thermal silicon nitride that is thick enough for a FET gate dielectric, but has a low thermal budget.

US Patent:

6730977, May 4, 2004

Filed:

Jun 3, 2003

Appl. No.:

10/452999

Inventors:

Glen D. Wilk - Dallas TX
John Mark Anthony - McKinney TX
Yi Wei - Chandler AZ
Robert M. Wallace - Richardson TX

Assignee:

Texas Instruments Incorporated - Dallas TX

International Classification:

H01L 2976

US Classification:

257410, 257327

Abstract:

A method for forming a thermal silicon nitride on a semiconductor substrate is disclosed. This method allows formation of thermal silicon nitride that is thick enough for a FET gate dielectric, but has a low thermal budget.

US Patent:

6777674, Aug 17, 2004

Filed:

Sep 23, 2002

Appl. No.:

10/252659

Inventors:

Thomas M. Moore - Dallas TX
John M. Anthony - Austin TX

Assignee:

Omniprobe, Inc. - Dallas TX

International Classification:

G01N 2322

US Classification:

250307, 25044211

Abstract:

We disclose a method for analyzing the composition of a microscopic particle resting on a first sample surface. The method comprises positioning a micro-manipulator probe near the particle; attaching the particle to the probe; moving the probe and the attached particle away from the first sample surface; positioning the particle on a second sample surface; and, analyzing the composition of the particle on the second sample surface by energy-dispersive X-ray analysis or detection of Auger electrons. The second surface has a reduced or non-interfering background signal during analysis relative to the background signal of the first surface. We also disclose methods for adjusting the electrostatic forces and DC potentials between the probe, the particle, and the sample surfaces to effect removal of the particle, and its transfer and relocation to the second sample surface.

US Patent:

6841439, Jan 11, 2005

Filed:

Jul 15, 1998

Appl. No.:

09/116138

Inventors:

John Mark Anthony - McKinney TX, US
Scott R. Summerfelt - Garland TX, US
Robert M. Wallace - Richardson TX, US
Glen D. Wilk - Dallas TX, US

Assignee:

Texas Instruments Incorporated - Dallas TX

International Classification:

H01L 218238

US Classification:

438216, 438763

Abstract:

A field effect semiconductor device comprising a high permittivity silicate gate dielectric and a method of forming the same are disclosed herein. The device comprises a silicon substrate having a semiconducting channel region formed therein. A metal silicate gate dielectric layer is formed over this substrate, followed by a conductive gate. Silicate layer may be, e. g. , hafnium silicate, such that the dielectric constant of the gate dielectric is significantly higher than the dielectric constant of silicon dioxide. However, the silicate gate dielectric may also be designed to have the advantages of silicon dioxide, e. g. high breakdown, low interface state density, and high stability. The present invention includes methods for depositing both amorphous and polycrystalline silicate layers, as well as graded composition silicate layers.

US Patent:

6897105, May 24, 2005

Filed:

Sep 15, 1999

Appl. No.:

09/396642

Inventors:

Glen D. Wilk - Dallas TX, US
Robert M. Wallace - Richardson TX, US
John M. Anthony - Richardson TX, US
Paul McIntyre - Dallas TX, US

Assignee:

Texas Instrument Incorporated - Dallas TX

International Classification:

H01L021/8242
H01L021/44

US Classification:

438240, 438239, 438608, 438957, 438785

Abstract:

An embodiment of the instant invention is a method of forming a electrically conductive structure insulatively disposed from a second structure, the method comprising: providing the second structure; forming the electrically conductive structure of a material (step of FIG. ) that remains substantially conductive after it is oxidized; forming an electrically insulative layer (step of FIG. ) between the second structure and the conductive structure; and oxidizing the conductive structure by subjecting it to an ozone containing atmosphere for a duration of time and at a first temperature.

US Patent:

7115461, Oct 3, 2006

Filed:

Dec 17, 2004

Appl. No.:

11/015604

Inventors:

John Mark Anthony - McKinney TX, US
Scott R. Summerfelt - Garland TX, US
Robert M. Wallace - Richardson TX, US
Glen D. Wilk - Dallas TX, US

Assignee:

Texas Instruments Incorporated - Dallas TX

International Classification:

H01L 21/8238

US Classification:

438216, 438287, 438591, 438763, 257E21625

Abstract:

A field effect semiconductor device comprising a high permittivity silicate gate dielectric and a method of forming the same are disclosed herein. The device comprises a silicon substrate having a semiconducting channel region formed therein. A metal silicate gate dielectric layer is formed over this substrate, followed by a conductive gate. Silicate layer may be, e. g. , hafnium silicate, such that the dielectric constant of the gate dielectric is significantly higher than the dielectric constant of silicon dioxide. However, the silicate gate dielectric may also be designed to have the advantages of silicon dioxide, e. g. high breakdown, low interface state density, and high stability. The present invention includes methods for depositing both amorphous and polycrystalline silicate layers, as well as graded composition silicate layers.

US Patent:

20010053593, Dec 20, 2001

Filed:

Jun 1, 2001

Appl. No.:

09/870631

Inventors:

Glen Wilk - Dallas TX, US
Robert Wallace - Richardson TX, US
John Anthony - Richardson TX, US
Paul McIntyre - Dallas TX, US

International Classification:

H01L021/3205
H01L021/4763

US Classification:

438/585000

Abstract:

An embodiment of the instant invention is a method of forming a electrically conductive structure insulatively disposed from a second structure, the method comprising: providing the second structure; forming the electrically conductive structure of a material (step of FIG. ) that remains substantially conductive after it is oxidized; forming an electrically insulative layer (step of FIG. ) between the second structure and the conductive structure; and oxidizing the conductive structure by subjecting it to an ozone containing atmosphere for a duration of time and at a first temperature.