John Gregory

US Patent:

6451699, Sep 17, 2002

Filed:

Jul 30, 1999

Appl. No.:

09/364140

Inventors:

John Gregory - Battle Ground WA

Assignee:

LSI Logic Corporation - Milpitas CA

International Classification:

H01L 2100

US Classification:

438692, 15634512

Abstract:

A method of planarizing a wafer surface of a semiconductor wafer having an elevated portion extending therefrom is described. The method includes the step of positioning a fluid flow surface relative to the wafer surface so that (i) a space is defined between the wafer surface and the fluid flow surface, and (ii) the elevated portion of the semiconductor wafer is positioned in the space. The method also includes the step of advancing a fluid within the space so that the fluid contacts and erodes the elevated portion of the semiconductor wafer. An associated apparatus for planarizing a wafer surface of a semiconductor wafer having an elevated portion extending therefrom is also described.

US Patent:

6566268, May 20, 2003

Filed:

Jul 25, 2002

Appl. No.:

10/205229

Inventors:

John Gregory - Battle Ground WA

Assignee:

LSI Logic Corporation - Milpitas CA

International Classification:

H01L 21302

US Classification:

438692, 438690, 438691, 438693, 438747, 216 88, 216 89, 216 90, 216 91, 216 92

Abstract:

A method of planarizing a wafer surface of a semiconductor wafer having an elevated portion extending therefrom is described. The method includes the step of positioning a fluid flow surface relative to the wafer surface so that (i) a space is defined between the wafer surface and the fluid flow surface, and (ii) the elevated portion of the semiconductor wafer is positioned in the space. The method also includes the step of advancing a fluid within the space so that the fluid contacts and erodes the elevated portion of the semiconductor wafer. An associated apparatus for planarizing a wafer surface of a semiconductor wafer having an elevated portion extending therefrom is also described.

US Patent:

6524926, Feb 25, 2003

Filed:

Nov 27, 2000

Appl. No.:

09/723434

Inventors:

Derryl Allman - Camas WA
John Gregory - Gresham OR

Assignee:

LSI Logic Corporation - Milpitas CA

International Classification:

H01L 2120

US Classification:

438387, 438243, 438622

Abstract:

Within metal interconnect layers above a substrate of an integrated circuit, a vertical metal-insulator-metal (VMIM) capacitor is formed by the same damascene metallization types of processes that formed the metal interconnect layers. The metal interconnect layers have horizontal metal conductor lines, are vertically separated from other metal interconnect layers by an interlayer dielectric (ILD) layer, and electrically connect to the other metal interconnect layers through via connections extending through the ILD layer. One vertical capacitor plate of the VMIM capacitor is defined by a metal conductor line and a via connection. The other vertical capacitor plate is defined by a metal region adjacent to the metal conductor line and the via connection. The metal conductor line, the via connection and the metal region are formed by the damascene metallization processes.

US Patent:

6541383, Apr 1, 2003

Filed:

Jun 29, 2000

Appl. No.:

09/607169

Inventors:

Derryl D. J. Allman - Camas WA
John W. Gregory - Battle Ground WA

Assignee:

LSI Logic Corporation - Milpitas CA

International Classification:

H01L 21302

US Classification:

438692, 438693, 216 88, 216 89, 451444, 451539, 451 57, 451 60, 451 66, 15634512

Abstract:

An arrangement for planarizing a surface of a semiconductor wafer. The arrangement includes a planarizing member having a planarizing surface configured to be (i) positioned in contact with and (ii) moved relative to the surface of the semiconductor wafer so as to remove material from the surface of the semiconductor wafer such that the surface of the semiconductor wafer is planarized. The arrangement also includes an adherence promoting ligand chemically bonded to the planarizing surface of the planarizing member. The arrangement further includes an abrasion particle chemically bonded to the adherence promoting ligand such that the abrasion particle is attached to the planarizing surface of the planarizing member. The arrangement also includes a conditioning bar having a conditioning portion positioned in contact with a wafer track defined on the planarizing member. The conditioning portion is configured so that the conditioning portion extends completely across the wafer track.

US Patent:

6891219, May 10, 2005

Filed:

Nov 26, 2002

Appl. No.:

10/306011

Inventors:

Derryl Allman - Camas WA, US
John Gregory - Gresham OR, US

Assignee:

LSI Logic Corporation - Milpitas CA

International Classification:

H01L027/108

US Classification:

257311, 257307

Abstract:

Within metal interconnect layers above a substrate of an integrated circuit, a vertical metal-insulator-metal (VMIM) capacitor is formed by the same damascene metallization types of processes that formed the metal interconnect layers. The metal interconnect layers have horizontal metal conductor lines, are vertically separated from other metal interconnect layers by an interlayer dielectric (ILD) layer, and electrically connect to the other metal interconnect layers through via connections extending through the ILD layer. One vertical capacitor plate of the VMIM capacitor is defined by a metal conductor line and a via connection. The other vertical capacitor plate is defined by a metal region adjacent to the metal conductor line and the via connection. The metal conductor line, the via connection and the metal region are formed by the damascene metallization processes.

US Patent:

20040010213, Jan 15, 2004

Filed:

Jul 10, 2002

Appl. No.:

10/192272

Inventors:

John Gregory - Lake Oswego OR, US
William Brennan - Tualatin OR, US

Assignee:

Mav-Tech Medical L.L.C.

International Classification:

A61F005/00

US Classification:

602/020000

Abstract:

An articulated multi-adjustable shoulder, arm, elbow, etc. stabilizer brace system which includes elongate hinged-together stabilizer struts to which are adjustably joined, for effective lateral-positional adjustment, support pads designed to bear against the human anatomy during use.