John J Hanicak

US Patent:

56460686, Jul 8, 1997

Filed:

Feb 3, 1995

Appl. No.:

8/384506

Inventors:

Arthur M. Wilson - Richardson TX
Mark A. Kressley - Richardson TX
Dean L. Frew - Springfield VA
Juanita G. Miller - Richardson TX
John E. Hanicak - Plano TX
Philip E. Hecker - Garland TX
James M. Drumm - Crystal Lake IL

Assignee:

Texas Instruments Incorporated - Dallas TX

International Classification:

H01L 2144

US Classification:

437183

Abstract:

A method of making a microelectronic circuit and the connection pattern therefor including the steps of providing a substrate (3), preferably silicon and preferably including a layer of nickel (38) under a layer of gold (36) thereon. Regions are formed on the substrate for connection of electrical components to the substrate using a first metallurgy, preferably gold and a pattern of bumps (5, 7) is formed of a second metallurgy different from the first metallurgy, preferably lead/tin solder. An interconnection pattern is formed on the substrate contacting at least one bump and at least one pad. The pattern of solder bumps is formed by providing a coupon (31) and patterning the bumps on the coupon and applied to the substrate while attached to the coupon, then heated to cause flow of the bumps onto the substrate. The coupon is then removed from the bumps with the bumps remaining on the substrate. Electrical components are applied to the region of first metallurgy and electrically bonded by wire bonding or Tape Automated Bonding techniques.