John F Hennessy

US Patent:

55686303, Oct 22, 1996

Filed:

Feb 21, 1995

Appl. No.:

8/391946

Inventors:

Earl A. Killian - Los Altos CA
Thomas J. Riordan - Los Altos CA
Danny L. Freitas - San Jose CA
Ashish B. Dixit - Union City CA
John L. Hennessy - Atherton CA

Assignee:

Silicon Graphics, Inc. - Mountain View CA

International Classification:

G06F 1206

US Classification:

395375

Abstract:

A technique for extending the data word size and the virtual address space of a pre-existing architecture so that hardware for the extended architecture also supports the pre-existing architecture. Extension of the data word size from m bits to N bits entails widening the machine registers and data paths from m bits to N bits and sign-extending entities of m or fewer bits to N bits when they are loaded into registers. Some of the m-bit instructions, when operating on N-bit sign-extended versions of m-bit entities, produce an N-bit result that may not correspond to the correct m-bit result, sign-extended to N bits. For these instructions compatibility requires that the instructions be further defined to guarantee a sign-extended result. This means that separate N-bit instructions corresponding to these m-bit instructions are needed. The support for up to an N-bit virtual address space is provided in part by widening the virtual address data paths.

US Patent:

54209927, May 30, 1995

Filed:

Apr 5, 1994

Appl. No.:

8/223388

Inventors:

Earl A. Killian - Both of Los Altos CA
Thomas J. Riordan - Both of Los Altos CA
Danny L. Freitas - San Jose CA
Ashish B. Dixit - Union City CA
John L. Hennessy - Atherton CA

Assignee:

Silicon Graphics, Inc. - Mountain View CA

International Classification:

G06F 9318
G06F 934
G06F 1202
G06F 1210

US Classification:

395375

Abstract:

A technique for extending the data word size and the virtual address space of a pre-existing architecture so that hardware for the extended architecture also supports the pre-existing architecture. Extension of the data word size from m bits to N bits entails widening the machine registers and data paths from m bits to N bits and sign-extending entities of m or fewer bits to N bits when they are loaded into registers. Some of the m-bit instructions, when operating on N-bit sign-extended versions of m-bit entities, produce an N-bit result that may not correspond to the correct m-bit result, sign-extended to N bits. For these instructions compatibility requires that the instructions be further defined to guarantee a sign-extended result. This means that separate N-bit instructions corresponding to these m-bit instructions are needed. The support for up to an N-bit virtual address space is provided in part by widening the virtual address data paths.