John G Lovelace

US Patent:

20110154006, Jun 23, 2011

Filed:

Dec 21, 2009

Appl. No.:

12/643108

Inventors:

MAHESH S. NATU - Sunnyvale CA, US
John V. Lovelace - Irmo SC, US
Rajesh P. Banginwar - Hillsboro OR, US

International Classification:

G06F 9/00

US Classification:

713 2

Abstract:

Memory channel training parameters are function of electrical characteristics of memory devices, processor(s) and memory channel(s). Training steps can be skipped if the BIOS can determine that the memory devices, motherboard and processor have not changed since the last boot. Memory devices contain a serial number for tracking purposes and most motherboards contain a serial number. Many processors do not provide a mechanism by which the BIOS can track the processor. Described herein are techniques that allow the BIOS to track a processor and detect a swap without violating privacy/security requirements.

US Patent:

20150325281, Nov 12, 2015

Filed:

Mar 4, 2015

Appl. No.:

14/639025

Inventors:

- Santa Clara CA, US
Jonathan C. JASPER - San Jose CA, US
John V. LOVELACE - Irmo SC, US
Benjamin T. TYSON - Columbia SC, US

International Classification:

G11C 11/4076
G11C 11/4096

Abstract:

A memory controller transmits a control signal to a memory module, where the memory controller continuously transmits a clock signal to the memory module. The memory controller determines adjustments to the control signal with respect to the clock signal, by iteratively analyzing a strobe signal.