John R Mick

age ~84

from Denver, CO

Also known as:
  • John Raymond Mick
  • John Te Mick
  • John Childr Mick
  • John Raymond Nick
  • John Mick Llp
  • John Kenney

John Mick Phones & Addresses

  • Denver, CO
  • Brentwood, TN
  • Alpine, AZ
  • Sunnyvale, CA
  • Santa Clara, CA
  • Plano, TX

Us Patents

  • Fully Synchronous Pipelined Ram

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  • US Patent:
    6343047, Jan 29, 2002
  • Filed:
    Jul 25, 2000
  • Appl. No.:
    09/625382
  • Inventors:
    John R. Mick - San Jose CA
  • Assignee:
    Integrated Device Technologies, Inc. - Santa Clara CA
  • International Classification:
    G11C 800
  • US Classification:
    365233, 365191, 36518907
  • Abstract:
    A memory system includes a memory, an input circuit and a logic circuit. The input circuit is coupled to receive a memory address and, during a write operation, the corresponding write data to be written into the SRAM. The logic circuit causes the write data to be stored in the input circuit for the duration of any sequential read operations immediately following the write operation and then to be read into the memory during subsequent write operation. During the read operation, data which is stored in the write data storage registers prior to being read into the memory can be read out from the memory system should the address of one or more read operations equal the address of the data to be written into the memory while temporarily stored in the write data storage registers. Thus, no âbus turnaroundâ down time is experienced by the system thereby increasing the bandwidth of the system. The system can operate in a single pipeline mode or a dual pipeline mode.
  • Content Addressable Memory With Longest Match Detect

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  • US Patent:
    6370613, Apr 9, 2002
  • Filed:
    Jul 27, 1999
  • Appl. No.:
    09/361680
  • Inventors:
    Thomas Diede - Cupertino CA
    John R. Mick - San Jose CA
  • Assignee:
    Integrated Device Technology, Inc. - Santa Clara CA
  • International Classification:
    G06F 1204
  • US Classification:
    711108, 711103, 711100
  • Abstract:
    A CAM system is provided for determining which data word in a CAM array exhibits the longest continuous, unmasked match with an input data value. The input data value is divided into non-overlapping subfields, thereby creating a series of keys, the first key of the series including either the least significant bit (LSB) or most significant bit (MSB) of the input data value. The CAM array is divided along columns into a similar series of non-overlapping sub-arrays corresponding to the subfields defined by the series of keys. A first CAM sub-array compares the first key with its stored rows of data bit values to generate a first match signal. The first match signal disables each row of the second CAM sub-array for which the corresponding row of the first CAM sub-array did not show a match. A second CAM sub-array then compares the second key with its enabled rows to generate a second match signal. The second match signal disables each row of the third CAM sub-array for which the corresponding row of either the first or second CAM sub-array did not show a match.
  • Pipelining A Content Addressable Memory Cell Array For Low-Power Operation

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  • US Patent:
    6470418, Oct 22, 2002
  • Filed:
    Jan 15, 1999
  • Appl. No.:
    09/232413
  • Inventors:
    Chuen-Der Lien - Los Altos Hills CA
    John R. Mick - San Jose CA
  • Assignee:
    Integrated Device Technology, Inc. - Santa Clara CA
  • International Classification:
    G06F 1200
  • US Classification:
    711108, 711168, 365 49
  • Abstract:
    A content addressable memory (CAM) system that includes first and second CAM arrays, which generate first and second sets of match control signals, respectively, having higher and lower priorities, respectively. The first CAM array is enabled during a first memory cycle, and the first set of match control signals are analyzed. If a match exists in the first CAM array, a first priority encoder is enabled to process the first set of match control signals. If no match exists, the first priority encoder is not enabled, and a second memory cycle is initiated. The second CAM array is enabled during the second memory cycle, and the second set of signals is analyzed. If a match exists in the second CAM array, a second priority encoder is enabled to process the second set of match control signals. If no match exists, the second priority encoder is not enabled.
  • Fully Synchronous Pipelined Ram

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  • US Patent:
    6567338, May 20, 2003
  • Filed:
    Jul 25, 2000
  • Appl. No.:
    09/625382
  • Inventors:
    John R. Mick - San Jose CA
  • Assignee:
    Integrated Device Technology, Inc. - Santa Clara CA
  • International Classification:
    G11C 800
  • US Classification:
    365233, 365191, 36518907
  • Abstract:
    A memory system includes a memory, an input circuit and a logic circuit. The input circuit is coupled to receive a memory address and, during a write operation, the corresponding write data to be written into the SRAM. The logic circuit causes the write data to be stored in the input circuit for the duration of any sequential read operations immediately following the write operation and then to be read into the memory during subsequent write operation. During the read operation, data which is stored in the write data storage registers prior to being read into the memory can be read out from the memory system should the address of one or more read operations equal the address of the data to be written into the memory while temporarily stored in the write data storage registers. Thus, no âbus turnaroundâ down time is experienced by the system thereby increasing the bandwidth of the system. The system can operate in a single pipeline mode or a dual pipeline mode.
  • Separate Byte Control On Fully Synchronous Pipelined Sram

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  • US Patent:
    6591354, Jul 8, 2003
  • Filed:
    May 26, 1999
  • Appl. No.:
    09/320378
  • Inventors:
    John R. Mick - San Jose CA
    Mark W. Baumann - Campbell CA
  • Assignee:
    Integrated Device Technology, Inc. - Santa Clara CA
  • International Classification:
    G06F 938
  • US Classification:
    711169, 711168, 711104, 710 21, 710 33, 710 61, 712 27, 3652385, 365233
  • Abstract:
    A memory system including a memory array, an input circuit and a logic circuit is presented. The input circuit is coupled to receive a memory address and a set of individual write controls for each byte of data word. During a write operation, the input circuit also receives the corresponding write data to be written into the SRAM. The logic circuit causes the write data and write control information to be stored in the input circuit for the duration of any sequential read operations immediately following the write operation and then to be read into memory during a subsequent write operation. During the read operation, data which is stored in the write data storage registers prior to being read into the memory can be read out from the memory system should the address of one or more read operations equal the address of the data to be written into the memory while temporarily stored in the write data storage registers. The logic circuit also detects which bytes of data are not to be written into the SRAM so that, during a read operation, those bytes not to be written into the SRAM are read from the SRAM in order to output a complete word corresponding to the value at the read address. No âbus turnaroundâ down time is experienced by the system thereby increasing the bandwidth of the system.
  • Fully Synchronous Pipelined Ram

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  • US Patent:
    6785188, Aug 31, 2004
  • Filed:
    Jan 28, 2002
  • Appl. No.:
    10/059899
  • Inventors:
    John R. Mick - San Jose CA
  • Assignee:
    Integrated Device Technology, Inc. - Santa Clara CA
  • International Classification:
    G11C 800
  • US Classification:
    365233, 365191
  • Abstract:
    A memory system includes a memory, an input circuit and a logic circuit. The input circuit is coupled to receive a memory address and, during a write operation, the corresponding write data to be written into the SRAM. The logic circuit causes the write data to be stored in the input circuit for the duration of any sequential read operations immediately following the write operation and then to be read into the memory during subsequent write operation. During the read operation, data which is stored in the write data storage registers prior to being read into the memory can be read out from the memory system should the address of one or more read operations equal the address of the data to be written into the memory while temporarily stored in the write data storage registers. Thus, no âbus turnaroundâ down time is experienced by the system thereby increasing the bandwidth of the system. The system can operate in a single pipeline mode or a dual pipeline mode.
  • Content Addressable Memory (Cam) Devices That Perform Pipelined Multi-Cycle Look-Up Operations Using Cam Sub-Arrays And Longest Match Detection

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  • US Patent:
    RE40932, Oct 6, 2009
  • Filed:
    Oct 31, 2002
  • Appl. No.:
    10/285031
  • Inventors:
    Thomas Diede - Cupertino CA, US
    John R. Mick - Plano TX, US
  • Assignee:
    NetLogic Microsystems, Inc. - Mountain View CA
  • International Classification:
    G06F 12/04
  • US Classification:
    711108, 711100, 711103
  • Abstract:
    A CAM system is provided for determining which data word in a CAM array exhibits the longest continuous, unmasked match with an input data value. The input data value is divided into non-overlapping subfields, thereby creating a series of keys, the first key of the series including either the least significant bit (LSB) or most significant bit (MSB) of the input data value. The CAM array is divided along columns into a similar series of non-overlapping sub-arrays corresponding to the subfields defined by the series of keys. A first CAM sub-array compares the first key with its stored rows of data bit values to generate a first match signal. The first match signal disables each row of the second CAM sub-array for which the corresponding row of the first CAM sub-array did not show a match. A second CAM sub-array then compares the second key with its enabled rows to generate a second match signal. The second match signal disables each row of the third CAM sub-array for which the corresponding row of either the first or second CAM sub-array did not show a match.
  • Apparatus And Method For Matrix Memory Switching Element

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  • US Patent:
    7715377, May 11, 2010
  • Filed:
    Jul 19, 2005
  • Appl. No.:
    11/185072
  • Inventors:
    John Mick - Alpine AZ, US
    Craig Lindahl - McKinney TX, US
    Yongdong Zhao - Pleasanton CA, US
  • Assignee:
    Integrated Device Technology, Inc. - San Jose CA
  • International Classification:
    H04L 12/56
  • US Classification:
    370371, 370370, 370413, 370414, 370235
  • Abstract:
    A matrixed memory array device is disclosed that includes input ports and output ports. Each input port is coupled to a first data bus and each output port is coupled to a second data bus that is different and separate from the first data bus. A memory brick is placed at each cross-point between first data buses and second data buses so as to switchably couple frames of data from input ports to output ports. Each memory brick contains a plurality of eight transistor (8-T) memory cells that can be used to store, erase, read, write, and switchably couple a data bit from the input port to a corresponding output port.
Name / Title
Company / Classification
Phones & Addresses
John Mick
President
Werner - Mick Funeral Home Inc
Werner Chapel For Funerals. Cremation Specialists
Funeral Related Services. Cremation Services
3939 Lake Dr, previous address, Granite City, IL 62040
6189316317
John R. Mick
General partner
JOHN R. MICK FAMILY LLLP
15 County Rd 2043, Alpine, AZ
PO Box 46, Alpine, AZ 85920
John Mick
Principal
2M Properties LLC
Nonresidential Building Operator
5106 Yale Ct, Brentwood, TN 37027
John R. Mick
President
MICK VENTURES, INC
Business Services at Non-Commercial Site · Nonclassifiable Establishments
1009 Rubis Dr, Sunnyvale, CA 94087

Isbn (Books And Publications)

Data Broadcasting: Understanding the Atsc Data Broadcast Standard

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Author
John R. Mick

ISBN #
0071375902

Bit-Slice Microprocessor Design

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Author
John Mick

ISBN #
0070417814

Resumes

John Mick Photo 1

Vice President

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Location:
Brentwood, TN
Industry:
Philanthropy
Work:
The Mick Foundation
Vice President
John Mick Photo 2

John Mick

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John Mick Photo 3

John Mick

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Location:
Aurora, CO
Education:
Harvard University 2013 - 2020
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John Mick

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John Mick Photo 5

John Mick

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John Mick Photo 6

John Mick

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Location:
Denver, CO
Industry:
Computer Software
Skills:
Iptv
Agile Methodologies
Software Engineering
Cloud Computing
Software Development
Vod
Adaptive Streaming
Product Management
Integration
Linux
Ott
Targeted Advertising
Set Top Box
Mpeg
Streaming Media
Mobile Devices
System Architecture
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John Mick

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Interests:
Photography
Nature
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John Mick

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Googleplus

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John Mick

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John Mick

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John Mick

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John Mick

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John Mick

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John Mick

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John Mick

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John Mick

Myspace

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John Mick

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Locality:
Jenkins, New Jersey
Birthday:
1945
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John Mick

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Locality:
kaneohe bay, Hawaii
Birthday:
1950
John Mick Photo 19

john Mick

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Locality:
va beach, Virginia
Birthday:
1940
John Mick Photo 20

John mick

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Locality:
waverly, New York
Birthday:
1953
John Mick Photo 21

John Mick

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Locality:
CANTON, Ohio
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John Mick

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Locality:
CANTON, Ohio
Birthday:
1952
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John Mick

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Locality:
CROSSVILLE, Illinois
Birthday:
1918

Plaxo

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John Mick

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Sebastian, FLMarried 39 years to Sharon my soul mate. We have two kids, John and Michelle. We also have four grandkids, 3 boys and 1 girl.

Youtube

"ONLY YOU" original song written by John Mick...

"ONLY YOU" Original song by John Mick copyright 2010 I would consider ...

  • Category:
    Music
  • Uploaded:
    14 Mar, 2010
  • Duration:
    3m 40s

Mick Clarke with Long John Baldry 1979 Bottom...

Long John Baldry singing "A Thrill's a Thrill" at the Bottom Line club...

  • Category:
    Music
  • Uploaded:
    21 Mar, 2009
  • Duration:
    9m 52s

John Zorn's PAINKILLER feat. Mike Patton (Cit...

A warm reunion on stage of the notorious grind-jazz band PAINKILLER, i...

  • Category:
    Music
  • Uploaded:
    14 Jul, 2009
  • Duration:
    5m 49s

Mick Boogie / Peter Bjorn & John - Stay This ...

Official video. From Mick Boogie + Peter Bjorn and John's album "Re-Li...

  • Category:
    Music
  • Uploaded:
    14 Sep, 2009
  • Duration:
    3m 27s

Marriage Madness - John Mayall, Mick Taylor

From "Back To The Roots", Mick Taylor on lead.

  • Category:
    Music
  • Uploaded:
    27 Jan, 2008
  • Duration:
    3m 36s

Mick St. John Moonlight: Dark Side

This vid focuses on the relationship between Mick and Josef. Josef is ...

  • Category:
    Entertainment
  • Uploaded:
    09 Oct, 2007
  • Duration:
    2m 57s

Classmates

John Mick Photo 25

John Mick

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Schools:
Churchill High School San Antonio TX 1967-1971
Community:
Robert Klaus, Kathryn Seabrook
John Mick Photo 26

John (Mick) Pfleger

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Schools:
Palm Springs High School Palm Springs CA 1963-1967
Community:
Randall Nelson
John Mick Photo 27

John Mick

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Schools:
Wellsville High School Wellsville OH 1964-1968, Immaculate Conception School Wellsville OH 1964-1968
Community:
Marc Mccune, John Venesile, Linda Blackwell, Jack Jordan
John Mick Photo 28

John Mick

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Schools:
Springfield Christian School Springfield OH 1976-1980
Community:
Doug Reeb
John Mick Photo 29

John Mick

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Schools:
Mahopac Middle School Mahopac NY 1990-1994
Community:
Paul Spallina
John Mick Photo 30

John Mick

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Schools:
Hershey High School Hershey PA 1985-1989
John Mick Photo 31

John Mick

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Schools:
Shirley Lanham Elementary School Atsugi Base PA 1982-1985, La Presa Junior High School Spring Valley CA 1986-1987
Community:
Jeffrey Elliott, Talitha Johnson, Kay Freeman

Facebook

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John Mick Hammd Central ...

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Friends:
Michael Nava, Paul Johnson, Billy Turner, Robert Silvers
John Mick Hammond (Central Jersey, NJ)
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John Mick Hoglund Los An...

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John Mick Hoglund (Los Angeles, CA)
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John Mick Scrant PA

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Friends:
Jozef Schutzman, Mary Katherine Schutzman, Theresa De Souza
John Mick (Scranton, PA)
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John Mick II Chicago IL

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John Mick II (Chicago, IL)
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John Mick Inland Empire CA

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John Mick (Inland Empire, CA)
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John Mick Dayt OH

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Friends:
Jennifer A. Belford, Holly Walters, Rhoda Mick, Tom Brewer
John Mick (Dayton, OH)
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John Mick Spain

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John Mick (Spain)
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John Mick Ain

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Get Report for John R Mick from Denver, CO, age ~84
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