John B Packer

US Patent:

6804739, Oct 12, 2004

Filed:

Feb 5, 2002

Appl. No.:

10/068651

Inventors:

B. Arlen Young - Palo Alto CA
John S. Packer - San Jose CA
Wei Chuan Goh - Singapore, SG

Assignee:

Adaptec, Inc. - Milpitas CA

International Classification:

G06F 1338

US Classification:

710300, 710 31, 370230, 709224

Abstract:

A SCSI selective options message delay expander includes a capability for monitoring messages transferred between a first port and a second port of the expander, for delaying a pre-selected message, for modifying the delayed pre-selected message, and for storing information obtained from the delayed pre-selected message. The ability to change messages allows the expander to be used with SCSI initiators and/or SCSI target devices that have SCSI characteristics different from the SCSI characteristics of the expander.

US Patent:

54559545, Oct 3, 1995

Filed:

Dec 22, 1993

Appl. No.:

8/172503

Inventors:

John S. Packer - Milpitas CA

Assignee:

Adaptec, Inc. - Milpitas CA

International Classification:

G06F 1300
G06F 1320

US Classification:

395894

Abstract:

A host interface uses a state machine to control multiple sector transfers between a host computer and a physical storage medium, so that the idle time between sector transfers is minimized and not a function of the local microprocessor. A write sector counter is provided to keep track of the largest segment in a buffer memory so that demands for the local microprocessor is minimized. In addition, start counters pointing at the next sector in the buffer memory are provided to shorten response time in a read cache. BUSY and IRQ timers are provided to accommodate various implementations of BIOS's which may inadvertently clear a host interrupt to lead to a failure condition.

US Patent:

56873891, Nov 11, 1997

Filed:

Dec 22, 1993

Appl. No.:

8/173529

Inventors:

John S. Packer - Milpitas CA

Assignee:

Adaptec, Inc. - Milpitas CA

International Classification:

G06F 926
G06F 1202
G06F 13372

US Classification:

395825

Abstract:

A host interface uses a state machine to control multiple sector transfers between a host computer and a physical storage medium, so that the idle time between sector transfers is minimized and not a function of the local microprocessor. A write sector counter is provided to keep track of the largest segment in a buffer memory so that demands for the local microprocessor is minimized. In addition, start counters pointing at the next sector in the buffer memory are provided to shorten response time in a read cache. BUSY and IRQ timers are provided to accommodate various implementations of BIOS's which may inadvertently clear a host interrupt to lead to a failure condition.

US Patent:

59408626, Aug 17, 1999

Filed:

Mar 24, 1997

Appl. No.:

8/823779

Inventors:

Eric C. Erickson - Fremont CA
John S. Packer - San Jose CA

Assignee:

Adaptec, Inc. - Milpitas CA

International Classification:

G06F 1200

US Classification:

711154

Abstract:

A disk sequencer uses control words to identify starts and splits in headerless data sectors. Each control word indicates an event-count, an initial event, and a terminal event. The initial event, which can be an EOS pulse, a sector pulse, or a data sync pulse, synchronizes the start of a count until the terminal event. The terminal event causes either generation of a sector pulse indicating a start of a data sector or an interrupt indicating a split in a data sector. A disk sequencer includes an event counter and a data segment sequencer. The event counter starts counting at the initial event, counts the event-count, and generates the sector pulse or interrupt at the end of the event-count. A sector pulse starts a data segment sequencer processing a first data segment of a data sector. The interrupt causes the data segment sequencer to execute an interrupt routine for fields surrounding a servo sector.

US Patent:

57548897, May 19, 1998

Filed:

Apr 20, 1995

Appl. No.:

8/426430

Inventors:

John S. Packer - Milpitas CA

Assignee:

Adaptec, Inc. - Milpitas CA

International Classification:

G06F 1300

US Classification:

395876

Abstract:

A host interface uses a state machine to control multiple sector transfers between a host computer and a physical storage medium, so that the idle time between sector transfers is minimized and not a function of the local microprocessor. A write sector counter is provided to keep track of the largest segment in a buffer memory so that demands for the local microprocessor is minimized. In addition, start counters pointing at the next sector in the buffer memory are provided to shorten response time in a read cache. BUSY and IRQ timers are provided to accommodate various implementations of BIOS's which may inadvertently clear a host interrupt to lead to a failure condition.

US Patent:

55554377, Sep 10, 1996

Filed:

Jun 7, 1995

Appl. No.:

8/479238

Inventors:

John S. Packer - Milpitas CA

Assignee:

Adaptec, Inc. - Milpitas CA

International Classification:

G06F 300

US Classification:

395825

Abstract:

A host interface uses a state machine to control multiple sector transfers between a host computer and a physical storage medium, so that the idle time between sector transfers is minimized and not a function of the local microprocessor. A write sector counter is provided to keep track of the largest segment in a buffer memory so that demands for the local microprocessor is minimized. In addition, start counters pointing at the next sector in the buffer memory are provided to shorten response time in a read cache. BUSY and IRQ timers are provided to accommodate various implementations of BIOS's which may inadvertently clear a host interrupt to lead to a failure condition.