John F Potter

US Patent:

50739395, Dec 17, 1991

Filed:

Jun 8, 1989

Appl. No.:

7/363227

Inventors:

George Vensko - San Diego CA
Khuong B. Lieu - San Diego CA
Steven A. Meloche - San Diego CA
John C. Potter - San Diego CA

Assignee:

ITT Corporation - New York NY

International Classification:

G10L 708

US Classification:

381 43

Abstract:

There is disclosed a dynamic time warping (DTW) apparatus for use in a speech recognition system which also performs wordspotting or speaker verification based on speech recognition techniques. The DTW apparatus has the capability of processing given different groups of coefficients and doing such processing to arrive at Euclidean and dynamic distances independent of the number of coefficients in the group. Essentially the DTW can process 8, 16 or 24 coefficients and provide distance measurements based on such coefficients which will enable the same stored template to be utilized in comparing speech utterances as defined by the coefficients with stored template data. The configuration of the DTW is such that rapid processing can occur whereby the unit can process a large number of frames in a relatively short period, as the number of frames processed is a function of the number of coefficients in the processed group and can process different numbered coefficients in a rapid and reliable manner. The DTW also minimizes the template memory requirements. Only one copy of each template is stored in template memory.

US Patent:

45676062, Jan 28, 1986

Filed:

Nov 3, 1982

Appl. No.:

6/439018

Inventors:

George Vensko - Ramona CA
Lawrence Carlin - San Diego CA
John Potter - Ramona CA
Allen R. Smith - Poway CA

Assignee:

International Telephone and Telegraph Corporation - New York NY

International Classification:

G10L 100

US Classification:

381 43

Abstract:

A continuous speech recognition system includes a plurality of processors doing template comparisons of speech data. Each processor has an associated memory shared with the other processors by direct memory access (DMA) through a shared data bus. The DMA circuitry is distributed between the processors to eliminate redundancy, since if each processor had a full DMA circuit, one of the circuits would be idle when the processors communicated.