John H Simons

US Patent:

6785646, Aug 31, 2004

Filed:

May 14, 2001

Appl. No.:

09/855821

Inventors:

Yunbiao Wang - Fremont CA
John Simons - San Mateo CA

Assignee:

Renesas Technology Corporation - Tokyo

International Classification:

G10L 1912

US Classification:

704223, 704262, 704264, 704219

Abstract:

The present invention provides a method and system to improve the cookbook search algorithm used in a coding/decoding device or routine. The codebook search algorithm is performed by a processing system that allows for parallel execution of instructions, for example a DSP. An embodiment of the present invention provides a method for coding of a first waveform. First a plurality of vectors determined from a plurality of waveforms is stored in a memory. Next a minimum weighted error using a plurality of filter coefficients and the plurality of vectors is determined. The minimum weighted error gives a closest match between the first waveform and a second waveform synthesized from a selected vector of the plurality of vectors. Then an indication of said selected vector is provided as part of a code of the first waveform. The plurality of filter coefficients have added to them at least one duplicate filter coefficient such that the performance of determining the minimum weighted error is improved, by for example, at least one clock cycle.

US Patent:

20020083421, Jun 27, 2002

Filed:

Dec 22, 2000

Appl. No.:

09/747824

Inventors:

John Simons - San Mateo CA, US

Assignee:

Hitachi America, Ltd.

International Classification:

G06F009/45

US Classification:

717/140000

Abstract:

A assembler extended instruction set architecture ISA is formed from a current ISA to which is added new instructions. Assembly of source code listing of a mixture of current and new assembly language instructions is accomplished by preprocessing the source code to create a temporary file that contains the old instructions and data directives for each of the new assembly instructions that have, as the data arguments, the object code equivalent of such new instruction. The temporary file is then applied to the old assembler to produce, for each of the old assembly language instructions, the corresponding object code. The result, after linking, is an executable, machine language program for the new ISA.

US Patent:

20060101432, May 11, 2006

Filed:

Sep 6, 2005

Appl. No.:

11/221239

Inventors:

John Simons - San Mateo CA, US
Avadhani Shridhar - Santa Clara CA, US

Assignee:

Hitachi America, Ltd. - Tarrytown NY

International Classification:

G06F 9/45

US Classification:

717138000

Abstract:

A assembler extended instruction set architecture ISA is formed from a current ISA to which is added new instructions. Assembly of source code listing of a mixture of current and new assembly language instructions is accomplished by preprocessing the source code to create a temporary file that contains the old instructions and data directives for each of the new assembly instructions that have, as the data arguments, the object code equivalent of such new instruction. The temporary file is then applied to the old assembler to produce, for each of the old assembly language instructions, the corresponding object code. The result, after linking, is an executable, machine language program for the new ISA.

US Patent:

20060265664, Nov 23, 2006

Filed:

May 17, 2005

Appl. No.:

11/131815

Inventors:

John Simons - Half Moon Bay CA, US
Blake Brown - Los Gatos CA, US
Stephen Haigh - Ko Phangan, TH

International Classification:

G06F 9/00

US Classification:

715772000

Abstract:

A monitoring system and a method and computer program product for implementing a monitoring system are disclosed. In accordance with an embodiment of the system, information about locations of reference nodes in an area may be received. Utilizing the information about the locations of the reference nodes, graphical representations of the reference nodes may be presented in a graphical representation of the area at locations corresponding to the locations of the reference nodes in the area. At least one node in the area may be monitored so that, based on the monitoring, a graphical representation of the node may be displayed in the graphical representation of the area at a location corresponding to the location of the node.

US Patent:

58157140, Sep 29, 1998

Filed:

Apr 21, 1997

Appl. No.:

8/839229

Inventors:

Avadhani Shridhar - Sunnyvale CA
John Simons - Burlingame CA

Assignee:

Hitachi America, Ltd. - Tarrytown NY

International Classification:

G06F 945

US Classification:

395704

Abstract:

A method and apparatus for re-generating debug commands is provided comprising a source program having embedded debug commands in a first distinguishable field, and an assembler. The assembler operates on the source code extracting the embedded debug commands and associated address information from the source code while generating object code. The debug commands are stored in a command file for use during simulation. A simulator executes the assembled object code in conjunction with a debugger which executes the stored debug commands as designated during the execution cycle. Upon the termination of a simulation run and the subsequent modification of the source program, the debug commands are automatically re-generated with correct addresses as determined during the subsequent assembly. When the edited source file is loaded, the break-points are cleared and a new command file is executed to insure that the break-points are relocated to the correct source lines. The execution of the embedded debug commands can be enabled or disabled by means of a command line option, so when the debugging is complete, the debug information will not be outputted.