John Te Vu

US Patent:

6531774, Mar 11, 2003

Filed:

May 3, 2000

Appl. No.:

09/563497

Inventors:

Nhon T. Do - Mountain View CA
John Vu - San Jose CA

Assignee:

Advanced Micro Devices, Inc. - Sunnyvale CA

International Classification:

H01L 2334

US Classification:

257727, 324758, 324765, 439 17

Abstract:

A test fixture with an isolation plate grounds all of the solder balls of a ball grid array (BGA) of a chip scale package, except for a selected subset of the solder balls, to perform electrical characterization of the package. The isolation plate includes a recess ground into the plate, and a hole in the recess that permits access to the selected subset of solder balls. The recess provides clearance for a fixed compliant probe to land on the solder balls to be tested through the hole, and a probe contact surface for a ground portion of the probe to securely land.

US Patent:

20130144596, Jun 6, 2013

Filed:

Jan 11, 2012

Appl. No.:

13/348542

Inventors:

Bigi Lui - Hayward CA, US
Danica Milosevic Brinton - Oakland CA, US
Eric Matsumura - Fairfield CA, US
John Huan Vu - San Jose CA, US

Assignee:

Zynga Inc. - San Francisco CA

International Classification:

G06F 17/28

US Classification:

704 2, 704E11001

Abstract:

An apparatus and method providing a localization framework capable of localizing dynamic text is disclosed herein. The localization framework is configured to automatically identify and prioritize certain text contained within an application code base to be translated. Such text is pre-processed prior to translation to facilitate accurate and complete translation in a target language.

US Patent:

6384618, May 7, 2002

Filed:

Mar 15, 2000

Appl. No.:

09/525475

Inventors:

John W. Pursel - Sunnyvale CA
John Vu - San Jose CA
Nhon T. Do - Mountain View CA

Assignee:

Advanced Micro Devices, Inc. - Sunnyvale CA

International Classification:

G01R 104

US Classification:

324765, 324755

Abstract:

A test fixture with an isolation plate grounds all of the solder balls of a ball grid array (BGA) of a chip scale package, except for a selected subset of the solder balls, to perform electrical characterization of the package. The isolation plate includes at least one hole extending through the isolation plate that exposes the selected subset of the electrical contacts. The hole has a sidewall angled at a non-perpendicular angle from the horizontal plane of the isolation plate. The angle sidewall of the hole provides increased clearance for a fixed compliant probe to land on the solder balls to be tested in an electrical characterization process.

US Patent:

20160103826, Apr 14, 2016

Filed:

Dec 18, 2015

Appl. No.:

14/974768

Inventors:

- San Francisco CA, US
Danica Milosevic Brinton - Oakland CA, US
Eric Matsumura - Fairfield CA, US
John Huan Vu - San Jose CA, US

International Classification:

G06F 17/28
G06F 17/27
G06F 17/24

Abstract:

An apparatus and method providing a localization framework capable of localizing dynamic text is disclosed herein. The localization framework is configured to automatically identify and prioritize certain text contained within an application code base to be translated. Such text is pre-processed prior to translation to facilitate accurate and complete translation in a target language.

US Patent:

20150230338, Aug 13, 2015

Filed:

Apr 20, 2015

Appl. No.:

14/691468

Inventors:

- SANTA CLARA CA, US
Jin Zhao - San Jose CA, US
John T. Vu - Hillsboro OR, US

International Classification:

H05K 1/18
H05K 1/03
H05K 1/11
H05K 3/32
H05K 3/42

Abstract:

Embodiments of the present disclosure are directed towards a circuit board having integrated passive devices such as inductors, capacitors, resistors and associated techniques and configurations. In one embodiment, an apparatus includes a circuit board having a first surface and a second surface opposite to the first surface and a passive device integral to the circuit board, the passive device having an input terminal configured to couple with electrical power of a die, an output terminal electrically coupled with the input terminal, and electrical routing features disposed between the first surface and the second surface of the circuit board and coupled with the input terminal and the output terminal to route the electrical power between the input terminal and the output terminal, wherein the input terminal includes a surface configured to receive a solder ball connection of a package assembly including the die. Other embodiments may be described and/or claimed.