Johnny N Klarenbeek

age ~35

from Austin, TX

Also known as:
  • Nicholas Sutherland

Johnny Klarenbeek Phones & Addresses

  • Austin, TX
  • Dallas, TX
  • Palm Bay, FL
  • 4984 Hamlin Cir, Mims, FL 32754
  • Wellington, OH

Resumes

Johnny Klarenbeek Photo 1

Analog Design Engineer

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Location:
Dallas, TX
Industry:
Semiconductors
Work:
Texas Instruments Jan 2014 - Mar 2016
Design Verification Engineer

Texas Instruments Jan 2014 - Mar 2016
Analog Design Engineer

Los Alamos National Laboratory Jun 2012 - Aug 2012
Research Intern
Skills:
Mixed Signal
Analog Circuits
Analog Circuit Design
Integrated Circuit Design
Verification and Validation
Functional Verification
Integrated Circuits
Simulations
Verilog Ams
Systemverilog
Automation
Perl
Python
Matlab
Assertions
Automotive Electronics
C
C++
C#
Visual Basic
Latex
Spotfire
Cadence
Cadence Virtuoso
Cadence Spectre
Cadence Virtuoso Layout Editor
Johnny Klarenbeek Photo 2

Analog Design Engineer

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Location:
Austin, TX
Work:
Cirrus Logic
Analog Design Engineer

Us Patents

  • Channel Switchover Power Multiplexer Circuits, And Methods Of Operating The Same

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  • US Patent:
    20200052683, Feb 13, 2020
  • Filed:
    Aug 19, 2019
  • Appl. No.:
    16/544477
  • Inventors:
    - Dallas TX, US
    Sungho Beck - Plano TX, US
    Richard Turkson - Princeton TX, US
    Johnny Klarenbeek - Dallas TX, US
    Bixia Li - Plano TX, US
  • International Classification:
    H03K 17/00
    H03K 5/24
  • Abstract:
    Channel switchover power multiplexer circuits, and methods of operating the same are disclosed. An example power multiplexer a first transistor coupled to a first input, a second transistor coupled to the first transistor to couple a first voltage at the first input to an output, a third transistor coupled to a second input, a fourth transistor coupled to the third transistor to couple a second voltage at the second input to the output, a diode amplifier to provide a third voltage to a gate of the first transistor to block a reverse current, and a soft-start amplifier to provide a fourth voltage to a gate of the fourth transistor to turn on (with adjustable VOUT ramp rate) the fourth transistor with a constant ramp rate.
  • Gate Capacitance Control In A Load Switch

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  • US Patent:
    20170244403, Aug 24, 2017
  • Filed:
    Jun 30, 2016
  • Appl. No.:
    15/198618
  • Inventors:
    - Dallas TX, US
    Johnny Klarenbeek - Dallas TX, US
  • International Classification:
    H03K 17/081
    H02M 3/07
  • Abstract:
    A switch for controlling a power supply and a method of operating the switch are disclosed. The switch includes a first transistor having a drain and a source connected between Vand Vand a gate connected to be driven to a first voltage that is greater than V, an external capacitor operable, when connected to the gate of the first transistor, to control a rise time of V, and a circuit coupled to the gate of the first transistor and to the external capacitor, the circuit connected to couple the external capacitor to the gate of the first transistor responsive to an enable signal turning on and to uncouple the external capacitor from the gate of the first transistor responsive to the voltage on the gate reaching the first voltage.

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