Jonathan R Reid

US Patent:

6554914, Apr 29, 2003

Filed:

Feb 2, 2001

Appl. No.:

09/776704

Inventors:

Robert T. Rozbicki - San Jose CA
Ronald Allan Powell - San Carlos CA
Erich Klawuhn - San Jose CA
Michal Danek - Sunnyvale CA
Karl B. Levy - Los Altos CA
Jonathan David Reid - Sherwood OR
Mukul Khosla - San Jose CA
Eliot K. Broadbent - Beaverton OR

Assignee:

Novellus Systems, Inc. - San Jose CA

International Classification:

C23C 824

US Classification:

148238, 148282

Abstract:

The present invention pertains to systems and methods for passivating the copper seed layer deposited in Damascene integrated circuit manufacturing. More specifically, the invention pertains to systems and methods for depositing the copper seed layer by physical vapor deposition, while passivating the copper during or immediately after the deposition in order to prevent excessive oxidation of the copper. The invention is applicable to dual Damascene processing.

US Patent:

7341946, Mar 11, 2008

Filed:

Nov 10, 2003

Appl. No.:

10/705579

Inventors:

Sridhar K. Kailasam - Fremont CA, US
John Drewery - Alameda CA, US
Jonathan D. Reid - Sherwood OR, US
Eric G. Webb - Salem OR, US
Johanes H. Sukamto - Lake Oswego OR, US

Assignee:

Novellus Systems, Inc. - San Jose CA

International Classification:

H01L 21/44

US Classification:

438687, 438685, 438686

Abstract:

Methods are provided for electrochemically depositing copper on a work piece. One method includes the step of depositing overlying the work piece a barrier layer having a surface and subjecting the barrier layer surface to a surface treatment adapted to facilitate deposition of copper on the barrier layer. Copper then is electrochemically deposited overlying the barrier layer.

US Patent:

8172992, May 8, 2012

Filed:

Dec 8, 2009

Appl. No.:

12/633219

Inventors:

Vinay Prabhakar - Fremont CA, US
Bryan L. Buckalew - Tualatin OR, US
Kousik Ganesan - Tualatin OR, US
Shantinath Ghongadi - Wilsonville OR, US
Zhian He - Beaverton OR, US
Steven T. Mayer - Lake Oswego OR, US
Robert Rash - Portland OR, US
Jonathan D. Reid - Sherwood OR, US
Yuichi Takada - Tualatin OR, US
James R. Zibrida - Portland OR, US

Assignee:

Novellus Systems, Inc. - San Jose CA

International Classification:

C25B 9/02

US Classification:

20429709, 2042971, 20429714, 20429708

Abstract:

Methods, apparatuses, and various apparatus components, such as base plates, lipseals, and contact ring assemblies are provided for reducing contamination of the contact area in the apparatuses. Contamination may happen during removal of semiconductor wafers from apparatuses after the electroplating process. In certain embodiments, a base plate with a hydrophobic coating, such as polyamide-imide (PAI) and sometimes polytetrafluoroethylene (PTFE), are used. Further, contact tips of the contact ring assembly may be positioned further away from the sealing lip of the lipseal. In certain embodiments, a portion of the contact ring assembly and/or the lipseal also include hydrophobic coatings.

US Patent:

20110221044, Sep 15, 2011

Filed:

Mar 12, 2010

Appl. No.:

12/723532

Inventors:

Michal Danek - Cupertino CA, US
Tom Mountsier - San Jose CA, US
Jonathan Reid - Sherwood OR, US
Juwen Gao - San Jose CA, US
Aaron Fellis - San Jose CA, US

International Classification:

H01L 23/48
H01L 21/768

US Classification:

257621, 438644, 257753, 257E23011, 257E21584, 257E21597

Abstract:

Apparatus and methods for filling through silicon vias (TSV's) with copper having an intervening tungsten layer between the copper plug and the silicon are disclosed. Methods are useful for Damascene processing, with or without a TSV feature. The tungsten layer serves as a diffusion barrier, a seed layer for copper electrofill and a means of reducing CTE-induced stresses between copper and silicon. Adhesion of the tungsten layer to the silicon and of the copper layer to the tungsten is described.

US Patent:

20120181170, Jul 19, 2012

Filed:

Mar 28, 2012

Appl. No.:

13/432767

Inventors:

Vinay Prabhakar - Fremont CA, US
Bryan L. Buckalew - Tualatin OR, US
Kousik Ganesan - Tualatin OR, US
Shantinath Ghongadi - Tigard OR, US
Zhian He - Tigard OR, US
Steven T. Mayer - Lake Oswego OR, US
Robert Rash - Portland OR, US
Jonathan D. Reid - Sherwood OR, US
Yuichi Takada - Tualatin OR, US
James R. Zibrida - Portland OR, US

International Classification:

C25D 17/08

US Classification:

2042971, 20429706

Abstract:

Methods, apparatuses, and various apparatus components, such as base plates, lipseals, and contact ring assemblies are provided for reducing contamination of the contact area in the apparatuses. Contamination may happen during removal of semiconductor wafers from apparatuses after the electroplating process. In certain embodiments, a base plate with a hydrophobic coating, such as polyamide-imide (PAI) and sometimes polytetrafluoroethylene (PTFE), are used. Further, contact tips of the contact ring assembly may be positioned further away from the sealing lip of the lipseal. In certain embodiments, a portion of the contact ring assembly and/or the lipseal also include hydrophobic coatings.