Jonathan T Reid

US Patent:

57664994, Jun 16, 1998

Filed:

Apr 26, 1996

Appl. No.:

8/638251

Inventors:

Kim Joseph Blackwell - Owego NY
Daniel Peter Labzentis - Endicott NY
Jonathan David Reid - Johnson City NY

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

H01L 2102

US Classification:

216 96

Abstract:

A method of making a circuitized substrate wherein a dielectric layer is provided having a first layer of metallic material thereon. A first metallic member is formed on the dielectric's metallic layer, following which a pair of openings are precisely provided within a second dielectric material located on the dielectric. These openings in turn define a selected area on the first metallic member and, significantly, a precisely oriented pattern of the first metallic layer at a spaced distance from the metallic member. This metallic pattern serves as a mask to permit formation of an opening through the dielectric, which opening in turn may be engaged by tooling or the like such as may be used to position an electronic component, e. g. , semiconductor device, on the underlying substrate. The invention thus assures precise orientation and placement of components such as semiconductor devices on highly dense circuit patterns such as those required in the present art in the manufacture of devices such as those of the information handling system (computer) variety.

US Patent:

52804143, Jan 18, 1994

Filed:

Jun 11, 1990

Appl. No.:

7/536145

Inventors:

Charles R. Davis - Endicott NY
Richard Hsiao - Vestal NY
James R. Loomis - Binghamton NY
Jae M. Park - Somers NY
Jonathan D. Reid - Johnson City NY

Assignee:

International Business Machines Corp. - Armonk NY

International Classification:

H05K 336
H05K 111
B32B 3100

US Classification:

361795

Abstract:

A method is disclosed of simultaneously laminating circuitized dielectric layers to form a multilayer high performance circuit board and making interlevel electrical connections. The method selects two elements which will form a eutectic at one low temperature and will solidify to form an alloy which will only remelt at a second temperature higher than any required by any subsequent lamination. The joint is made using a transient liquid bonding technique and sufficient Au and Sn to result in a Au-Sn20wt% eutectic at the low temperature. Once solidified, the alloy formed remains solid throughout subsequent laminations. As a result, a composite, multilayer, high performance circuit board is produced, electrically joined at selected lands by the solid alloy.

US Patent:

54215072, Jun 6, 1995

Filed:

Oct 12, 1993

Appl. No.:

8/134994

Inventors:

Charles R. Davis - Endicott NY
Richard Hsiao - Vestal NY
James R. Loomis - Binghamton NY
Jae M. Park - Somers NY
Jonathan D. Reid - Johnson City NY

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

B23K 100

US Classification:

228194

Abstract:

A method is disclosed of simultaneously laminating circuitized dielectric layers to form a multilayer high performance circuit board and making interlevel electrical connections. The method selects two elements which will form a eutectic at one low temperature and will solidify to form an alloy which will only remelt at a second temperature higher than any required by any subsequent lamination. The joint is made using a transient liquid bonding technique and sufficient Au and Sn to result in a Au--Sn20wt% eutectic at the low temperature. Once solidified, the alloy formed remains solid throughout subsequent laminations. As a result, a composite, mulilayer, high performance circuit board is produced, electrically joined at selected lands by the solid alloy.

US Patent:

49043501, Feb 27, 1990

Filed:

Nov 14, 1988

Appl. No.:

7/270852

Inventors:

Jonathan D. Reid - Johnson City NY
Eugene P. Skarvinko - Binghamton NY
Arthur G. Starks - New Milford PA

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

C25D 706
C25D 1700

US Classification:

204 28

Abstract:

According to the present invention, a submersible electrical current supply device and method of plating using said device for providing electrical current to a strip as it is continuously moved through an electroplating bath is provided. The electrical current supply device includes a housing having a slot extending therethrough with entry and exit openings and has wipers disposed at both the entrance and exit openings. In the central section of the device, electrical contacts in the form of electrical brushes are biased into contact with the strip and are provided with electrical contacts to supply current for plating to the brushes. The strip is continuously passed through the slot and contact with the brushes and electrical current is supplied by the brushes. The thickness of the slot and the length of the slot is so controlled as to provide an amount of electrical plating solution around the brushes which as a sufficiently high electrical resistance to substantially eliminate any electroplating of the material on to the brushes.