Jose Ramon Garza

US Patent:

6765397, Jul 20, 2004

Filed:

Nov 21, 2002

Appl. No.:

10/302495

Inventors:

Jose A. Garza - Pflugerville TX

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G01R 3102

US Classification:

324754, 3241581

Abstract:

An apparatus and method are provided for effectively and efficiently testing or burning-in land grid array (LGA) modules, through the use of a self-aligning clamping device for clamping the LGA against a circuit card. The self-aligning clamping device includes a clamping body having an LGA contact surface adapted for bearing against the LGA module, and a pivot element for receiving a clamping force from a ram element selectively movable along a ram axis oriented generally normal to the array of electrical test contacts on the circuit card and transferring the clamping force to the clamping body. The clamping body is also a heat exchanger for maintaining the LGA module at a desired operating temperature during test or burn-in.

US Patent:

6911836, Jun 28, 2005

Filed:

Aug 21, 2003

Appl. No.:

10/645038

Inventors:

Lonnie J. Cannon - Austin TX, US
David Lewis Gardell - Fairfax VT, US
Jose Arturo Garza - Pflugerville TX, US
Jeffrey Frank Kutner - Pleasant Valley NY, US
Kenneth Carl Larsen - Georgetown TX, US
John Joseph Salazar - Austin TX, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G01R031/26

US Classification:

324765, 324760, 3241581

Abstract:

A chip testing system with improved thermal performance. In a preferred embodiment, a nest assembly of a chip testing apparatus includes tooling balls and a fitted frame for improving alignment of a coldplate and a chip surface. In preferred embodiments, the coldplate is of unibody design. Thermal performance is also improved by balancing the forces exerted on the coldplate using an adjustable hose mounting bracket. The bracket allows the forces exerted by the hoses on the coldplate to be adjusted so they balance and cancel other unwanted forces on the cold plate.

US Patent:

7352200, Apr 1, 2008

Filed:

Jan 12, 2005

Appl. No.:

11/033935

Inventors:

Jose Arturo Garza - Pflugerville TX, US
Dales Morrison Kent - Round Rock TX, US
Kenneth Carl Larsen - Georgetown TX, US
Hoa Thanh Phan - Austin TX, US
John Joseph Salazar - Austin TX, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G01R 31/02

US Classification:

324765, 324760, 3241581

Abstract:

Improved methods, systems, and apparatuses are disclosed for testing LGA devices. One example embodiment include vertical routing of test nest assembly cooling lines in order to minimize the test nest footprint and increase available test sites on a single test card. Another example embodiment includes isolating and adjusting external loads and moments into the heatsink/cold plate, wherein these loads and moments involve controlling the centroid to restore more ideal thermal performance of the heatsink/chip interface. Still another example embodiment includes a nest architecture facilitating easy and low-cost replacement of LGA sockets. Finally, another example embodiment includes efficient condensation control of test nest assembly parts by using dry-air exhaust.

US Patent:

7405583, Jul 29, 2008

Filed:

May 10, 2007

Appl. No.:

11/747200

Inventors:

Jose Arturo Garza - Pflugerville TX, US
Dales Morrison Kent - Round Rock TX, US
Kenneth Carl Larsen - Georgetown TX, US
Hoa Thanh Phan - Austin TX, US
John Joseph Salazar - Austin TX, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G01R 31/02

US Classification:

324755, 324760, 324765

Abstract:

Improved methods, systems, and apparatuses are disclosed for testing LGA devices. One example embodiment include vertical routing of test nest assembly cooling lines in order to minimize the test nest footprint and increase available test sites on a single test card. Another example embodiment includes isolating and adjusting external loads and moments into the heatsink/cold plate, wherein these loads and moments involve controlling the centroid to restore more ideal thermal performance of the heatsink/chip interface. Still another example embodiment includes a nest architecture facilitating easy and low-cost replacement of LGA sockets. Finally, another example embodiment includes efficient condensation control of test nest assembly parts by using dry-air exhaust.

US Patent:

7423440, Sep 9, 2008

Filed:

May 10, 2007

Appl. No.:

11/747207

Inventors:

Jose Arturo Garza - Pflugerville TX, US
Dales Morrison Kent - Round Rock TX, US
Kenneth Carl Larsen - Georgetown TX, US
Hoa Thanh Phan - Austin TX, US
John Joseph Salazar - Austin TX, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G01R 31/02

US Classification:

324760, 324765, 3241581

Abstract:

Improved methods, systems, and apparatuses are disclosed for testing LGA devices. One example embodiment include vertical routing of test nest assembly cooling lines in order to minimize the test nest footprint and increase available test sites on a single test card. Another example embodiment includes isolating and adjusting external loads and moments into the heatsink/cold plate, wherein these loads and moments involve controlling the centroid to restore more ideal thermal performance of the heatsink/chip interface. Still another example embodiment includes a nest architecture facilitating easy and low-cost replacement of LGA sockets. Finally, another example embodiment includes efficient condensation control of test nest assembly parts by using dry-air exhaust.

US Patent:

7425822, Sep 16, 2008

Filed:

May 10, 2007

Appl. No.:

11/747216

Inventors:

Jose Arturo Garza - Pflugerville TX, US
Dales Morrison Kent - Round Rock TX, US
Kenneth Carl Larsen - Georgetown TX, US
Hoa Thanh Phan - Austin TX, US
John Joseph Salazar - Austin TX, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G01R 31/02

US Classification:

3241581, 324760, 324765

Abstract:

Improved methods, systems, and apparatuses are disclosed for testing LGA devices. One example embodiment include vertical routing of test nest assembly cooling lines in order to minimize the test nest footprint and increase available test sites on a single test card. Another example embodiment includes isolating and adjusting external loads and moments into the heatsink/cold plate, wherein these loads and moments involve controlling the centroid to restore more ideal thermal performance of the heatsink/chip interface. Still another example embodiment includes a nest architecture facilitating easy and low-cost replacement of LGA sockets. Finally, another example embodiment includes efficient condensation control of test nest assembly parts by using dry-air exhaust.

US Patent:

7453279, Nov 18, 2008

Filed:

May 10, 2007

Appl. No.:

11/747197

Inventors:

Jose Arturo Garza - Pflugerville TX, US
Dales Morrison Kent - Round Rock TX, US
Kenneth Carl Larsen - Georgetown TX, US
Hoa Thanh Phan - Austin TX, US
John Joseph Salazar - Austin TX, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G01R 31/02

US Classification:

324765, 324760, 3241581

Abstract:

Improved methods, systems, and apparatuses are disclosed for testing LGA devices. One example embodiment include vertical routing of test nest assembly cooling lines in order to minimize the test nest footprint and increase available test sites on a single test card. Another example embodiment includes isolating and adjusting external loads and moments into the heatsink/cold plate, wherein these loads and moments involve controlling the centroid to restore more ideal thermal performance of the heatsink/chip interface. Still another example embodiment includes a nest architecture facilitating easy and low-cost replacement of LGA sockets. Finally, another example embodiment includes efficient condensation control of test nest assembly parts by using dry-air exhaust.

US Patent:

7456644, Nov 25, 2008

Filed:

May 10, 2007

Appl. No.:

11/747210

Inventors:

Jose Arturo Garza - Pflugerville TX, US
Dales Morrison Kent - Round Rock TX, US
Kenneth Carl Larsen - Georgetown TX, US
Hoa Thanh Phan - Austin TX, US
John Joseph Salazar - Austin TX, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G01R 31/02

US Classification:

324755, 324760, 324765

Abstract:

Improved methods, systems, and apparatuses are disclosed for testing LGA devices. One example embodiment include vertical routing of test nest assembly cooling lines in order to minimize the test nest footprint and increase available test sites on a single test card. Another example embodiment includes isolating and adjusting external loads and moments into the heatsink/cold plate, wherein these loads and moments involve controlling the centroid to restore more ideal thermal performance of the heatsink/chip interface. Still another example embodiment includes a nest architecture facilitating easy and low-cost replacement of LGA sockets. Finally, another example embodiment includes efficient condensation control of test nest assembly parts by using dry-air exhaust.

Address:

4609 Raintree Blvd, Austin, TX 78745

VIN:

1HGFA16557L065128

Make:

HONDA

Model:

CIVIC

Year:

2007