Professor, Electrical & Computer Engineering at Rice University
Location:
Houston, Texas Area
Industry:
Higher Education
Work:
Rice University
Professor, Electrical & Computer Engineering
University of Oulu - Finland Jan 2005 - Jun 2005
Visiting Professor
AT&T Bell Laboratories Jun 1981 - Aug 1983
Member of Technical Staff
Education:
Cornell University 1983 - 1988
PhD, Electrical Engineering
Princeton University 1981 - 1982
M.S.E.E., Electrical Engineering
University of Pennsylvania 1977 - 1981
B.S.E.E., Electrical Engineering
Planner/La At Pennoni Associates Inc. Consulting Engineers
Landscape Architect/Planner at PHRA a Pennoni Company
Location:
Leesburg, Virginia
Industry:
Architecture & Planning
Work:
PHRA a Pennoni Company - Leesburg, Va. since Aug 2005
Landscape Architect/Planner
Calvin Giordano Apr 2005 - Aug 2005
Planner
QPK Design Oct 2003 - Apr 2005
Landscape Designer
Appel Osborn Landscape Architecture Apr 2002 - Oct 2003
Landscape Designer
Education:
State University of New York College of Environmental Sciences and Forestry 2000 - 2003
BLA, Landscape Architecture
Onondaga Community College 1998 - 2000
AAS, Architecture
State University of New York College of Environmental Sciences and Forestry 2000 - 2003
BLA, Bachelors of Landscape Architecture
Onondaga Community College 1998 - 2000
AAS, Architecture
Joseph R. Cavallaro - Pearland TX Gang Xu - Houston TX
Assignee:
Nokia Telecommunications, Oy
International Classification:
H04B 7216
US Classification:
370342, 375148, 375150
Abstract:
A multistage detector is disclosed that maximizes computation power while minimizing system delay. The differencing multistage detector receives signals from a plurality of users in a cell of a communications system and reduces the effect of multiple access interference to a signal from a desired user caused by interference from other users in the cell. The differencing multistage detector includes a plurality of stages, each stage including an interference canceller for removing intra-cell interference caused by the other users in the cell and producing an estimation output vector, wherein except for a first stage, the estimation output vector of a current stage is based on both a decision of the interference canceller of the current stage and the output from an interference canceller of a previous stage. The estimation output vector of a current stage is produced by combining the output from an interference canceller of a previous stage and the decision of the interference canceller of the current stage. Except for the first stage each interference canceller calculates an estimate of multi-user interference by computing a product of a cross-correlation of the received signals and a difference signal thereby reducing the number of multiplication operations required.
Fft Accelerated Iterative Mimo Equalizer Receiver Architecture
Yuanbin Guo - Richardson TX, US Dennis McCain - Lewisville TX, US Joseph R Cavallaro - Pearland TX, US
Assignee:
Nokia Corporation - Espoo
International Classification:
H03K 5/159 H04B 1/10
US Classification:
375232, 375350
Abstract:
A receiver, such as a CDMA MIMO receiver, includes a LMMSE-based chip-level equalizer constructed so as to implement a FFT accelerated iterative algorithm having a complexity of order O(N log(N)), where N is the dimension of a covariance matrix. The equalizer uses one of an overlap-save or an over-lap add FFT architecture.
Reduced Parallel And Pipelined High-Order Mimo Lmmse Receiver Architecture
Yuanbin Guo - Richardson TX, US Jianzhong Zhang - Irving TX, US Dennis McCain - Lewisville TX, US Joseph R. Cavallaro - Pearland TX, US
Assignee:
Nokia Corporation - Espoo
International Classification:
H04B 1/707 H03H 7/30
US Classification:
375229, 375147, 375232
Abstract:
Disclosed is a LMMSE receiver that restores orthogonality of spreading codes in the downlink channel for a spread spectrum signal received over N receive antennas. The FFT-based chip equalizer tap solver reduces the direct matrix inverse of the prior art to the inverse of some submatrices of size N×N with the dimension of the receive antennas, and most efficiently reduces matrix inverses to no larger than 2×2. Complexity is further reduced over a conventional Fast Fourier Transform approach by Hermitian optimization to the inverse of submatrices and tree pruning. For a receiver with N=4 or N=2 with double oversampling, the resulting 4×4 matrices are partitioned into 2×2 block sub-matrices, inverted, and rebuilt into a 4×4 matrix. Common computations are found and repeated computations are eliminated to improve efficiency. Generic design architecture is derived from the special design blocks to eliminate redundancies in complex operations.
System, Apparatus, And Method For Adaptive Weighted Interference Cancellation Using Parallel Residue Compensation
A system, apparatus and method for a multi-stage Parallel Residue Compensation (PRC) receiver for enhanced suppression of the Multiple Access Interference (MAI) in Code Division Multiple Access (CDMA) systems. The accuracy of the interference estimation is improved with a set of weights computed from an adaptive Normalized Least Mean Square (NLMS) algorithm. In order to reduce complexity, the commonality of the multi-code processing is extracted and used to derive a structure of PRC to avoid direct interference cancellation. The derived PRC structure reduces the interference cancellation architecture from a complexity that is proportional to the square of the number of users to a complexity that is linear with respect to the number of users. The complexity is further reduced by replacing dedicated multiplier circuits with simple combinational logic.
Limiting Candidates For Symbol Detection In A Mimo Communication System
Kiarash Amiri - Houston TX, US Raghavendar Mysore Rao - Austin TX, US Christopher H. Dick - San Jose CA, US Joseph R. Cavallaro - Pearland TX, US
Assignee:
Xilinx, Inc. - San Jose CA
International Classification:
H04B 7/02
US Classification:
375267, 375299, 375347
Abstract:
A circuit detects symbols communicated between multiple transmitting antennas and multiple receiving antennas (MIMO). Distance blocks are coupled in a sequence according to an ordering of the transmitting antennas. The respective distance block associated with each transmitting antenna determines a distance value for each pairing of one or more candidates and a symbol in a constellation. A respective selector block is coupled between each successive pair of distance blocks in the sequence. The respective selector block selects the one or more candidates for the successive distance block as a limited number of the pairings having smaller ones of the distance values. A limit block coupled to the selector blocks provides the limited number to each selector block. An identifier block selects the pairing having a smaller one of the distance values from the last distance block in the sequence.
Kiarash Amiri - Houston TX, US Christopher H. Dick - San Jose CA, US Raghavendar Mysore Rao - Austin TX, US Joseph R. Cavallaro - Pearland TX, US
Assignee:
XILINX, Inc. - San Jose CA
International Classification:
H04L 27/06
US Classification:
375340, 375267, 375347
Abstract:
Circuits are provided for detecting symbols transmitted from multiple transmitting antennas to multiple receiving antennas. A circuit includes distance blocks, selectors, and an identifier block. Each distance-block includes at least one sub-block, and each sub-block inputs a candidate for a corresponding transmitting antenna. The sub-block determines partial distances for pairings of the candidate and each symbol in a constellation from a partial distance of the candidate and signals received at the receiving antennas. At least one selector assigns each pairing for each candidate for a corresponding transmitting antenna to a bin having a range that includes the partial distance of the pairing. The selector selects candidates for a successive transmitting antenna from the bins having the smaller ranges. The identifier block selects a final candidate that is one of the pairings for a last transmitting antenna having a smaller partial distance.
Detecting In-Phase And Quadrature-Phase Amplitudes Of Mimo Communications
Kiarash Amiri - Houston TX, US Christopher H. Dick - San Jose CA, US Raghavendar Mysore Rao - Austin TX, US Joseph R. Cavallaro - Pearland TX, US
Assignee:
Xilinx, Inc. - San Jose CA
International Classification:
H04L 27/06
US Classification:
375340
Abstract:
Circuits detect communications from multiple transmitting antennas to multiple receiving antennas. A respective first block for each non-initial transmitting antenna determines partial distances for pairings of a first candidate and a quadrature-phase amplitude. A respective second block for the initial transmitting antenna determines partial distances for combinations of phase amplitudes. A respective second block for each non-initial transmitting antenna determines partial distances for pairings of a second candidate and an in-phase amplitude. A respective first selector for each non-initial transmitting antenna selects the first candidates from the pairings for the respective second block having smaller partial distances. A respective second selector for each non-initial transmitting antenna selects the second candidates from the pairings for the respective first block having smaller partial distances. An identifier circuit selects a final candidate with a smaller partial distance from the pairings of the respective second block for the last transmitting antenna.
Distributed Iterative Decoding For Co-Operative Diversity
Gilles Charbit - Hampshire, GB Jorma O. Lilleberg - Oulu, FI Joseph R. Cavallaro - Pearland TX, US Marjan Karkooti - Bryan TX, US
Assignee:
Nokia Corporation - Espoo
International Classification:
H04B 7/14
US Classification:
370279, 455 7, 455 15, 455 16
Abstract:
A source sends an encoded data block during a first time interval to a destination and to a relay. The source sends additional parity bits for the encoded data block during a second time interval. The relay partially decodes that encoded data block to a process-defined end point (typically only a partial decoding), such as a fixed number of decoding iterations. After partial decoding the relay forms a modified data block having corrected information bits and the parity bits of the block it received, and sends the modified data block to the destination, during the second time interval. The destination decodes to a results-defined end point the modified data block it received from the relay using the additional parity bits it received from the source. If that end-point cannot be reached, the destination may begin anew decoding the original encoded data block it received from the source.