Joseph E Goforth

US Patent:

47836032, Nov 8, 1988

Filed:

Jan 8, 1987

Appl. No.:

7/001354

Inventors:

Joseph M. Goforth - San Jose CA
Elvan S. Young - Santa Clara CA

Assignee:

Cypress Semiconductor Corporation - San Jose CA

International Classification:

H03K 1716
H03K 1903
H03K 19092

US Classification:

307443

Abstract:

An input buffer for coupling TTL logic circuits to CMOS logic circuits, the buffer being used to convert between standard TTL logic signals and CMOS logic signals. The buffer includes a first inverter circuit and a second inverter circuit coupled in a cascade (output of first inverter coupled to the input of the second inverter). The first inverter includes two resistors (Rcc and Rss); the Rcc resistor couples the first inverter to a first reference voltage, which is usually a power supply voltage rail, and Rss couples the first inverter to a second reference voltage. The first inverter also includes a capacitor coupled in parallel with that inverter. Power supply noise is isolated from the first inverter so that the buffer has better immunity from noise than the prior art.