Joseph A Smart

US Patent:

6478871, Nov 12, 2002

Filed:

Oct 2, 2000

Appl. No.:

09/676938

Inventors:

James R. Shealy - Ithaca NY
Joseph A. Smart - Auburn NY

Assignee:

Cornell Research Foundation, Inc. - Ithaca NY

International Classification:

C30B 2504

US Classification:

117 84, 117 94, 117 95, 117951

Abstract:

An epitaxial deposition process produces epitaxial lateral overgrowth (ELO) of nitride based materials directly a patterned substrate ( ). The substrate ( ) is preferably formed from SiC or sapphire, and is patterned with a mask ( ), preferably formed of silicon nitride, having a plurality of openings ( ) formed therein. A nucleation layer ( ), preferably formed of AlGaN, is grown at a high reactor temperature of 700-1100 degrees C. , which wets the exposed substrate surface, without significant nucleation on the mask ( ). This eliminates the need for regrowth while producing smooth growth surfaces in the window openings ( ) as well as over the mask ( ). Subsequent deposition of a nitride based material layer ( ), preferably GaN, results in a relatively defect free planar surfaced material grown laterally over the mask ( ).

US Patent:

7026665, Apr 11, 2006

Filed:

Oct 20, 2003

Appl. No.:

10/689979

Inventors:

Joseph Smart - Mooresville NC, US
Brook Hosse - Huntersville NC, US
Shawn Gibb - Charlotte NC, US
David Grider - Huntersville NC, US
Jeffrey Shealy - Huntersville NC, US

Assignee:

RF Micro Devices, Inc. - Greensboro NC

International Classification:

H01L 31/072
H01L 31/109

US Classification:

257190, 257189, 257194

Abstract:

The present invention relates to a high voltage and high power gallium nitride (GaN) transistor structure. In general, the GaN transistor structure includes a sub-buffer layer that serves to prevent injection of electrons into a substrate during high voltage operation, thereby improving performance of the GaN transistor structure during high voltage operation. Preferably, the sub-buffer layer is aluminum nitride, and the GaN transistor structure further includes a transitional layer, a GaN buffer layer, and an aluminum gallium nitride Schottky layer.

US Patent:

7052942, May 30, 2006

Filed:

Oct 20, 2003

Appl. No.:

10/689980

Inventors:

Joseph Smart - Mooresville NC, US
David Grider - Huntersville NC, US
Shawn Gibb - Charlotte NC, US
Brook Hosse - Huntersville NC, US
Jeffrey Shealy - Huntersville NC, US

Assignee:

RF Micro Devices, Inc. - Greensboro NC

International Classification:

H01L 21/84
H01L 21/338
H01L 31/0328

US Classification:

438162, 438172, 257194

Abstract:

The present invention relates to passivation of a gallium nitride (GaN) structure before the GaN structure is removed from an epitaxial growth chamber. The GaN structure includes one or more structural epitaxial layers deposited on a substrate, and the passivation layer deposited on the structural epitaxial layers. In general, the passivation layer is a dielectric material deposited on the GaN structure that serves to passivate surface traps on the surface of the structural epitaxial layers. Preferably, the passivation layer is a dense, thermally deposited silicon nitride passivation layer.

US Patent:

7250360, Jul 31, 2007

Filed:

Mar 2, 2005

Appl. No.:

11/069040

Inventors:

James R. Shealy - Ithaca NY, US
Joseph A. Smart - Mooresville NC, US

Assignee:

Cornell Research Foundation, Inc. - Ithaca NY

International Classification:

H01L 21/28
H01L 21/3205

US Classification:

438603, 438604, 438607, 257E21097, 257E21108, 257E21112, 257E21118, 257E21126

Abstract:

A single step process for nucleation and subsequent epitaxial growth on a lattice mismatched substrate is achieved by pre-treating the substrate surface with at least one group III reactant or at least one group II reactant prior to the introduction of a group V reactant or a group VI reactant. The group III reactant or the group II reactant is introduced into a growth chamber at an elevated growth temperature to wet a substrate surface prior to any actual crystal growth. Once the pre-treatment of the surface is complete, a group V reactant or a group VI reactant is introduced to the growth chamber to commence the deposition of a nucleation layer. A buffer layer is then grown on the nucleation layer providing a surface upon which the epitaxial layer is grown preferably without changing the temperature within the chamber.

US Patent:

7408182, Aug 5, 2008

Filed:

Apr 4, 2006

Appl. No.:

11/397279

Inventors:

Joseph Smart - Mooresville NC, US
David Grider - Huntersville NC, US
Shawn Gibb - Charlotte NC, US
Brook Hosse - Huntersville NC, US
Jeffrey Shealy - Huntersville NC, US

Assignee:

RF Micro Devices, Inc. - Greensboro NC

International Classification:

H01L 29/06
H01L 29/26

US Classification:

257 13, 257 79, 257194, 257E29246, 257E33001, 257E33034, 257E21403, 257E21407

Abstract:

The present invention relates to passivation of a gallium nitride (GaN) structure before the GaN structure is removed from an epitaxial growth chamber. The GaN structure includes one or more structural epitaxial layers deposited on a substrate, and the passivation layer deposited on the structural epitaxial layers. In general, the passivation layer is a dielectric material deposited on the GaN structure that serves to passivate surface traps on the surface of the structural epitaxial layers. Preferably, the passivation layer is a dense, thermally deposited silicon nitride passivation layer.

US Patent:

7459356, Dec 2, 2008

Filed:

Feb 23, 2006

Appl. No.:

11/360734

Inventors:

Joseph Smart - Mooresville NC, US
Brook Hosse - Huntersville NC, US
Shawn Gibb - Charlotte NC, US
David Grider - Huntersville NC, US
Jeffrey Shealy - Huntersville NC, US

Assignee:

RF Micro Devices, Inc. - Greensboro NC

International Classification:

H01L 21/338

US Classification:

438172, 438167, 257194

Abstract:

The present invention relates to a high voltage and high power gallium nitride (GaN) transistor structure. In general, the GaN transistor structure includes a sub-buffer layer that serves to prevent injection of electrons into a substrate during high voltage operation, thereby improving performance of the GaN transistor structure during high voltage operation. Preferably, the sub-buffer layer is aluminum nitride, and the GaN transistor structure further includes a transitional layer, a GaN buffer layer, and an aluminum gallium nitride Schottky layer.

US Patent:

7638346, Dec 29, 2009

Filed:

Aug 14, 2006

Appl. No.:

11/503660

Inventors:

Leo J. Schowalter - Latham NY, US
Joseph A. Smart - Mooresville NC, US
Shiwen Liu - Acton MA, US
Kenneth E. Morgan - Castleton NY, US
Robert T. Bondokov - Watervliet NY, US
Timothy J. Bettles - Bethlehem PA, US
Glen A. Slack - Scotia NY, US

Assignee:

Crystal IS, Inc. - Green Island NY

International Classification:

H01L 21/00

US Classification:

438 47, 438 46, 438 22, 117 88, 117104, 257E21085

Abstract:

Semiconductor structures and devices based thereon include an aluminum nitride single-crystal substrate and at least one layer epitaxially grown thereover. The epitaxial layer may comprise at least one of AlN, GaN, InN, or any binary or tertiary alloy combination thereof, and have an average dislocation density within the semiconductor heterostructure is less than about 10cm.

US Patent:

7968391, Jun 28, 2011

Filed:

Nov 8, 2007

Appl. No.:

11/937207

Inventors:

Joseph Smart - Mooresville NC, US
Brook Hosse - Huntersville NC, US
Shawn Gibb - Charlotte NC, US
David Grider - Huntersville NC, US
Jeffrey B. Shealy - Huntersville NC, US

Assignee:

RF Micro Devices, Inc. - Greensboro NC

International Classification:

H01L 21/338

US Classification:

438172, 438167, 438194, 438 47, 257194

Abstract:

A high voltage and high power gallium nitride (GaN) transistor structure is disclosed. A plurality of structural epitaxial layers including a GaN buffer layer is deposited on a substrate. A GaN termination layer is deposited on the plurality of structural epitaxial layers. The GaN termination layer is adapted to protect the plurality of structural epitaxial layers from surface reactions. The GaN termination layer is sufficiently thin to allow electrons to tunnel through the GaN termination layer. Electrical contacts are deposited on the GaN termination layer, thereby forming a high electron mobility transistor.