Julia Harper

age ~23

from Norfolk, MA

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Fault Zones For Interconnect Fabrics
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US Patent:

7774642, Aug 10, 2010
Filed:

Feb 17, 2005
Appl. No.:

11/061236
Inventors:

Bjørn Dag Johnsen - Oslo, NO
David M. Brean - Boston MA, US
Srinivas Madhur - Westford MA, US
Julia D. Harper - Arlington MA, US
Assignee:

Oracle America, Inc. - Redwood Shores CA
International Classification:

G06F 11/00
US Classification:

714 6, 714 4, 714 5, 714 40, 714 41, 714 44, 714 47
Abstract:

A fault zone definition mechanism groups components of an interconnect environment having a common point of dependence into a logical group defining a fault zone for the interconnect environment. The fault zone definition mechanism may be implemented in software, firmware or hardware, or a combination of two or more of software, firmware and hardware. A method for defining a fault zone is also disclosed.

Separation Of Control And Data Plane Functions In Soc Virtualized I/O Device
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US Patent:

20170286354, Oct 5, 2017
Filed:

Jun 21, 2017
Appl. No.:

15/629293
Inventors:

- Redwood City CA, US
Matthew Cohen - Cambridge MA, US
Rahoul Puri - Los Altos CA, US
Tayfun Kocaoglu - Los Gatos CA, US
John Johnson - San Jose CA, US
David Kahn - Makawao HI, US
Alan Adamson - San Diego CA, US
Sriram Jayakumar - Lexington MA, US
Julia Harper - Arlington MA, US
Robert G. Sheldon - Duxbury MA, US
Mark Kanda - Austin TX, US
International Classification:

G06F 13/42
G06F 9/455
G06F 13/36
Abstract:

An apparatus and method for controlling a device with shared hardware resources to provide separate execution environments for control and data functions are disclosed. A processor may be configured to generate a first request to access control functions of the device in response to execution of a first thread, and generate a second request to access data functions of the device in response to execution of a second thread. A communication unit may send first indicative of the first request and second data indicative of the second request to the device via first and second ports, respectively.

Implementation Of Reset Functions In An Soc Virtualized Device
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US Patent:

20170139721, May 18, 2017
Filed:

Nov 18, 2015
Appl. No.:

14/944893
Inventors:

- Redwood City CA, US
Sriram Jayakumar - Lexington MA, US
Rahoul Puri - Los Altos CA, US
Matthew Cohen - Cambridge MA, US
Julia Harper - Arlington MA, US
Alan Adamson - San Diego CA, US
John Johnson - San Jose CA, US
International Classification:

G06F 9/44
G06F 13/20
Abstract:

An apparatus and method for resetting a virtualized device are disclosed. The virtualized device may be coupled to a first port on a communication unit via a first link. The first port may send one or more instructions to the virtualized device via the first link using a first communication protocol. A processor may be configured to detect a reset condition for the virtualized device. In response to the detection of the reset condition for the virtualized device, the first port may disregard one or more transaction requests made by the virtualized device. The first port may further send an error message to the processor in response to receiving a Programmed Input/Output (PIO) request from the processor after the detection of the reset condition.

Separation Of Control And Data Plane Functions In Soc Virtualized I/O Device
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US Patent:

20170139873, May 18, 2017
Filed:

Nov 18, 2015
Appl. No.:

14/944835
Inventors:

- Redwood City CA, US
Matthew Cohen - Cambridge MA, US
Rahoul Puri - Los Altos CA, US
John Johnson - San Jose CA, US
Alan Adamson - San Diego CA, US
Julia Harper - Arlington MA, US
International Classification:

G06F 13/42
G06F 13/10
G06F 9/455
G06F 13/40
Abstract:

An apparatus and method for controlling a virtualized endpoint device are disclosed. A processor may be configured to execute instructions included in multiple execution threads. A first device may be configured to perform multiple command and data functions, and a communication unit may include a first port coupled to the first device via a first link and be configured to send instructions from the processor to the first device via the first link using a first communication protocol. The processor may be further configured to execute first and second sets of commands included in respective execution threads. The first set of commands may be associated with the plurality of command functions and the second set of commands may be associated with the plurality of data functions.

Method And System For Monitoring Resource Usage Of Logical Domains
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US Patent:

20150006918, Jan 1, 2015
Filed:

Jul 1, 2013
Appl. No.:

13/932715
Inventors:

- Redwood Shores CA, US
Julia Diane Harper - Arlington MA, US
International Classification:

G06F 1/26
G06F 9/455
US Classification:

713300
Abstract:

A method for obtaining power management data for a system executing by at least one processor, where a plurality of logical domains are executing on the system. The method includes determining, using the power management data, power consumption for each of the plurality of logical domains and receiving a request for power consumption information for the system. The method further includes providing, in response to the request, the power consumption information, where the power consumption information specifies the power consumption for at least one of the plurality of logical domains.