Maxim Integrated
Principal Member Technical Staff, Mixed Signal Verification at Maxim Integrated
Fujitsu Network Communications Sep 1999 - Dec 2012
Asic Verification Engineer
Cyrix Jun 1997 - Aug 1997
Perl Programmer
Mci Corporation Jun 1996 - Aug 1996
Labwindows and Cvi Programmer
Education:
Texas A&M University 1994 - 1999
Bachelors, Bachelor of Science, Electrical Engineering
Plano Senior High School 1992 - 1994
Skills:
Systemverilog Asic Specman Fpga Ethernet Perl Mixed Signal Open Verification Methodology Cadence Pcie Functional Verification Simulations Verilog Uvm Soc Application Specific Integrated Circuits Tcl Dft Vhdl Leadership Field Programmable Gate Arrays Rtl Design Modelsim Ncsim Ic Vlsi Altera Hardware Architecture Static Timing Analysis Xilinx Rtl Coding Ovm Universal Verification Methodology Analog Circuits