Kathryn A O'Brien

US Patent:

7146607, Dec 5, 2006

Filed:

Sep 17, 2002

Appl. No.:

10/244564

Inventors:

Ravi Nair - Briarcliff Manor NY, US
John Kevin O'Brien - South Salem NY, US
Kathryn Mary O'Brien - South Salem NY, US
Peter Howland Oden - Ossining NY, US
Daniel Arthur Prener - Croton-on-Hudson NY, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F 9/45

US Classification:

717151, 717153

Abstract:

A method (and system) of transparent dynamic optimization in a multiprocessing environment, includes monitoring execution of an application on a first processor with an execution monitor running on another processor of the system, and transparently optimizing one or more segments of the original application with a runtime optimizer executing on the another processor of the system.

US Patent:

7200840, Apr 3, 2007

Filed:

Oct 24, 2002

Appl. No.:

10/280187

Inventors:

Michael Karl Gschwind - Chappaqua NY, US
Kathryn M. O'Brien - South Salem NY, US
John Kevin O'Brien - South Salem NY, US
Valentina Salapura - Chappaqua NY, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F 9/45

US Classification:

717147, 717149, 711206

Abstract:

In the present invention, global information is passed from a first execution environment to a second execution environment, wherein both the first and second processor units comprise separate memories. The global variable is transferred through the invocation of a memory flow controller by a stub function. The global descriptor has a plurality of field indicia that allow a binder to link separate object files bound to the first and second execution environments.

US Patent:

7213123, May 1, 2007

Filed:

Oct 24, 2002

Appl. No.:

10/280243

Inventors:

Michael Karl Gschwind - Chappaqua NY, US
Kathryn M. O'Brien - South Salem NY, US
John Kevin O'Brien - South Salem NY, US
Valentina Salapura - Chappaqua NY, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F 12/10

US Classification:

711202, 711217, 711220

Abstract:

The present invention provides for the employment of a dynamic debugger for a parallel processing environment. This is achieved by dynamically updating mapping information at run-time in a mapping table, wherein the mapping table is read by the dynamic debugger.

US Patent:

7222332, May 22, 2007

Filed:

Oct 24, 2002

Appl. No.:

10/280242

Inventors:

Michael Karl Gschwind - Chappaqua NY, US
Kathryn M. O'Brien - South Salem NY, US
John Kevin O'Brien - South Salem NY, US
Valentina Salapura - Chappaqua NY, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F 9/44
G06F 9/30

US Classification:

717107, 712203

Abstract:

The present invention provides for creating and employing code and data partitions in a heterogeneous environment. This is achieved by separating source code and data into at least two partitioned sections and at least one unpartitioned section. Generally, a partitioned section is targeted for execution on an independent memory device, such as an attached processor unit. Then, at least two overlay sections are generated from at least one partition section. The plurality of partition sections are pre-bound to each other. A root module is also created, associated with both the pre-bound plurality of partitions and the overlay sections. The root module is employable to exchange the at least two overlay sections between the first and second execution environments. The pre-bound plurality of partition sections are then bound to the at least one unpartitioned section. The binding produces an integrated executable.

US Patent:

7225431, May 29, 2007

Filed:

Oct 24, 2002

Appl. No.:

10/280677

Inventors:

Michael Karl Gschwind - Chappaqua NY, US
Kathryn M. O'Brien - South Salem NY, US
John Kevin O'Brien - South Salem NY, US
Valentina Salapura - Chappaqua NY, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F 9/44
G06F 9/45
G06F 15/00
G06F 15/76
G06F 9/30

US Classification:

717129, 717149, 712 1, 712203, 712227

Abstract:

The present invention provides inserting and deleting a breakpoint in a parallel processing system. A breakpoint is inserted in a module loaded into the execution environment of an attached processor unit. The breakpoint can be inserted directly. Furthermore, the unloaded image of the module can also have a breakpoint associated with it. The breakpoint can be inserted directly into the module image, or a breakpoint request can be generated, and the breakpoint is inserted when the module is loaded into the execution environment of the attached processor unit.

US Patent:

7243195, Jul 10, 2007

Filed:

Dec 2, 2004

Appl. No.:

11/002553

Inventors:

John Kevin Patrick O'Brien - South Salem NY, US
Kathryn M. O'Brien - South Salem NY, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F 12/00

US Classification:

711159, 711118, 711165

Abstract:

The present invention provides for a method for computer program code optimization for a software managed cache in either a uni-processor or a multi-processor system. A single source file comprising a plurality of array references is received. The plurality of array references is analyzed to identify predictable accesses. The plurality of array references is analyzed to identify secondary predictable accesses. One or more of the plurality of array references is aggregated based on identified predictable accesses and identified secondary predictable accesses to generate aggregated references. The single source file is restructured based on the aggregated references to generate restructured code. Prefetch code is inserted in the restructured code based on the aggregated references. Software cache update code is inserted in the restructured code based on the aggregated references.

US Patent:

7243333, Jul 10, 2007

Filed:

Oct 24, 2002

Appl. No.:

10/280244

Inventors:

Michael Karl Gschwind - Chappaqua NY, US
Kathryn M. O'Brien - South Salem NY, US
John Kevin O'Brien - South Salem NY, US
Valentina Salapura - Chappaqua NY, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F 9/44
G06F 9/30

US Classification:

717107, 712203

Abstract:

The present invention provides a compilation system for compiling and linking an integrated executable adapted to execute on a heterogeneous parallel processor architecture. The compiler and linker compile different segments of the source code for a first and second processor architecture, and generate appropriate stub functions directed at loading code and data to remote nodes so as to cause them to perform operations described by the transmitted code on the data. The compiler and linker generate stub objects to represent remote execution capability, and stub objects encapsulate the transfers necessary to execute code in such environment.

US Patent:

7461205, Dec 2, 2008

Filed:

Jun 1, 2006

Appl. No.:

11/421505

Inventors:

John Kevin Patrick O'Brien - South Salem NY, US
Kathryn O'Brien - South Salem NY, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F 12/00
G06F 9/06
G06F 9/30
G06F 9/40

US Classification:

711118, 711125, 711123, 711133, 711154, 711165, 711213, 711215

Abstract:

Mechanisms for performing useful computations during a software cache reload operation are provided. With the illustrative embodiments, in order to perform software caching, a compiler takes original source code, and while compiling the source code, inserts explicit cache lookup instructions into appropriate portions of the source code where cacheable variables are referenced. In addition, the compiler inserts a cache miss handler routine that is used to branch execution of the code to a cache miss handler if the cache lookup instructions result in a cache miss. The cache miss handler, prior to performing a wait operation for waiting for the data to be retrieved from the backing store, branches execution to an independent subroutine identified by a compiler. The independent subroutine is executed while the data is being retrieved from the backing store such that useful work is performed.