Kavous Kev Vakilian from Tustin, CA, age 42

Name / Title

Company / Classification

Phones & Addresses

Kavous Vakilian
President

XICOM, INC

4500 Campus Dr STE 365, Newport Beach, CA 92660

High-Density Computer Modules With Double-Layer Packaging
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US Patent:

60943556, Jul 25, 2000
Filed:

Apr 4, 1998
Appl. No.:

9/055193
Inventors:

Kavous Vakilian - Laguna Hills CA
Assignee:

Viking Components - Rancho Santa Margarita CA
International Classification:

H05K 702
US Classification:

361761
Abstract:

An expansion module for mounting in an expansion slot of a computer includes a board with a plurality of apertures formed therein. Each aperture has a first chip package disposed substantially therein and a second chip package mounted to the board in a substantially spaced relationship to the first chip package. An interface is disposed on the board for engaging with the computer. By disposing one of the chip packages within the aperture and the other chip packaged in a spaced relationship therewith, the chip density may be essentially doubled over conventional boards.

High-Density Computer Module With Stacked Parallel-Plane Packaging
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US Patent:

62227394, Apr 24, 2001
Filed:

Jan 12, 1999
Appl. No.:

9/228867
Inventors:

Jayesh R. Bhakta - Cerritos CA
Kavous Vakilian - Laguna Hills CA
Assignee:

Viking Components - Rancho Santa Margarita CA
International Classification:

H05K 111
H05K 114
H01R 1204
US Classification:

361790
Abstract:

A module for insertion into an expansion slot of a computer includes a primary board and a pair of auxiliary boards. The auxiliary boards are mounted in a spaced relationship on respective sides of the primary board to define air paths between the boards. The air paths allow air to circulate between the boards. The auxiliary boards each have a trace for electrically connecting the board to the primary board, and the primary board has a trace for connecting chips mounted thereon to an interface with the expansion slot. The traces of the auxiliary boards are substantially the same length. The trace of the primary boards is only slightly longer than the traces of the auxiliary boards.

Multi-Chip Package With Stacked Chips And Interconnect Bumps
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US Patent:

61607185, Dec 12, 2000
Filed:

Dec 8, 1998
Appl. No.:

9/207490
Inventors:

Kavous Vakilian - Laguna Hills CA
Assignee:

Viking Components - Rancho Santa Margarita CA
International Classification:

H05K 118
H05K 706
US Classification:

361803
Abstract:

A multi-chip package includes a substrate having an opening about the central region. At least two integrated circuit chips are mounted on the substrate. The first chip is connected to one side of the substrate, while the second chip is connected to the other side of the substrate. At least a portion of one of the chips is positioned within the opening, and the chips are vertically stacked. The bottom side of the substrate includes a plurality of interconnect bumps for providing electrical connection to a circuit board or other substrate.

Kavous Kev Vakilian