Keith R Jenkins

US Patent:

7095264, Aug 22, 2006

Filed:

Dec 2, 2003

Appl. No.:

10/725847

Inventors:

Keith A. Jenkins - Sleepy Hollow NY, US
Jien-Chung Lo - Kingston RI, US
Peilin Song - Lagrangeville NY, US
Tian Xia - Burlington VT, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

H03H 11/26

US Classification:

327276, 327317

Abstract:

A programmable jitter signal generator is provided that includes a jitter distribution control unit, a selection unit in signal communication with the jitter distribution control unit, and a delay unit in signal communication with the selection unit; and a corresponding method of generating a programmable jitter signal includes programming a control unit, receiving a reference signal, delaying the received reference signal by a multiple of a base time increment, and selecting a delayed reference signal delayed by a desired multiple of the base time increment in accordance with the programmed control unit.

US Patent:

7116092, Oct 3, 2006

Filed:

Jul 28, 2004

Appl. No.:

10/900733

Inventors:

Keith Aelwyn Jenkins - Sleepy Hollow NY, US
Anup Paul Jose - New York NY, US
Scott Kevin Reynolds - Granite Springs NY, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G01R 23/00
G01R 23/14

US Classification:

324 7619, 324 7623

Abstract:

Spectrum analyzer circuits and methods are provided which implement “zero-IF” (direct conversion) or “near-zero IF” (or very low IF) architectures that enable implementation of integrated (on-chip) spectrum analyzers for measuring the frequency spectrum of internal chip signals. An integrated spectrum analyzer circuit, which includes a zero IF or near-zero IF framework, enables a low-power compact design with sufficient resolution bandwidth for on-chip implementation and diagnostics of internal chip signals.

US Patent:

7170310, Jan 30, 2007

Filed:

Sep 8, 2004

Appl. No.:

10/936164

Inventors:

Keith A. Jenkins - Sleepy Hollow NY, US
Stephen V. Kosonocky - Wilton CT, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G01R 31/26
G01R 31/28

US Classification:

324765

Abstract:

A test system and method for integrated circuits includes an energy source having an adjustable energy rate, and a feedback device, which measures a physical quantity at a discrete position on an integrated circuit. A control circuit adjusts the power source to externally apply energy to the integrated circuit at the discrete position. A circuit tester applies test programs to the integrated circuit while the discrete position is maintained at a value of the physical quantity in accordance with the control circuit.

US Patent:

7218091, May 15, 2007

Filed:

Jul 13, 2006

Appl. No.:

11/485390

Inventors:

Keith A. Jenkins - Sleepy Hollow NY, US
Stanislav Polonsky - Putnam Valley NY, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G01R 23/00

US Classification:

324 7619, 324 7622

Abstract:

An integrated spectrum analyzer for performing on-chip power spectrum measurements, includes a digital autocorrelator that includes an analog input for inputting analog signal samples from a chip, an analog-to-digital converter for converting the analog signal samples into digital signal samples, a storage register for storing a first converted digital signal sample for a period of time, a digital multiplier for multiplying the first stored digital signal after the period of time with a second undelayed digital signal sample to produce a product of multiplication, and an accumulator for accumulating a plurality of products of multiplication for each new period of time. The digital autocorrelator computes an autocorrelation function based on the analog signal samples and is integrally formed on the chip for performing power spectrum measurements on the analog signal samples to compute the autocorrelation function.

US Patent:

7355429, Apr 8, 2008

Filed:

Mar 24, 2005

Appl. No.:

11/089215

Inventors:

Keith A. Jenkins - Sleepy Hollow NY, US
Anuja Sehgal - Durham NC, US
Peilin Song - Lagrangeville NY, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G01R 31/02

US Classification:

324763, 324765

Abstract:

Techniques for on-chip detection of integrated circuit power supply noise are disclosed. By way of example, a technique for monitoring a power supply line in an integrated circuit includes the following steps/operations. A first signal and a second signal are preconditioned. The first signal is representative of a voltage of the power supply line being monitored. The second signal is representative of a voltage of a reference power supply line. Preconditioning includes shifting respective levels of the voltages such that the voltages are within an output voltage range of comparator circuitry. Then, the preconditioned first signal and the preconditioned second signal are compared in accordance with the comparator circuitry. Comparison includes detecting when a difference exists between the voltage level of the preconditioned first signal and the voltage level of the preconditioned second signal.

US Patent:

7378831, May 27, 2008

Filed:

Jan 18, 2007

Appl. No.:

11/624392

Inventors:

Keith A. Jenkins - Sleepy Hollow NY, US
Seongwon Kim - Old Tappan NJ, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G01R 19/00
G01R 29/02
H03H 11/26

US Classification:

324 7611, 327276, 702 79

Abstract:

A system and a method for determining a delay time interval of components are provided. The system includes a delay chain of components having a plurality of components wherein each component of the delay chain of components has a first delay time interval. The system utilizes a reference clock signal to stimulate the delay change of components and monitors a delay clock signal output by the delay chain of components to determine a delay time interval associated with each component in the delay chain of components.

US Patent:

7439755, Oct 21, 2008

Filed:

Jan 31, 2007

Appl. No.:

11/669250

Inventors:

Keith A. Jenkins - Sleepy Hollow NY, US
Jae-Joon Kim - Yorktown Heights NY, US
Rahul M. Rao - Elmsford NY, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G01R 31/26

US Classification:

324769

Abstract:

An electronic circuit includes an output terminal and at least a first measuring FET. The second drain-source terminals of a plurality of FETS to be tested are interconnected with the first drain-source terminal of the first measuring FET and the output terminal. The second drain-source terminal of the first measuring FET is interconnected with a first biasing terminal. The first drain-source terminals of the FETS to be tested are interconnected with a second biasing terminal. A state machine is coupled to the gates of the FETS to be tested and the gate of the first measuring FET. The state machine is configured to energize the gate of the first measuring FET and to sequentially energize the gates of the FETS to be tested, so that an output voltage appears on the output terminal. Circuitry to compare the output voltage to a reference value is also provided.

US Patent:

7443187, Oct 28, 2008

Filed:

Oct 18, 2007

Appl. No.:

11/874528

Inventors:

Keith A. Jenkins - Sleepy Hollow NY, US
Anuja Sehgal - Durham NC, US
Peilin Song - Lagrangeville NY, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G01R 31/02

US Classification:

324763, 324765

Abstract:

Techniques for on-chip detection of integrated circuit power supply noise are disclosed. By way of example, a technique for monitoring a power supply line in an integrated circuit includes the following steps/operations. A first signal and a second signal are preconditioned. The first signal is representative of a voltage of the power supply line being monitored. The second signal is representative of a voltage of a reference power supply line. Preconditioning includes shifting respective levels of the voltages such that the voltages are within an input voltage range of comparator circuitry. Then, the preconditioned first signal and the preconditioned second signal are compared in accordance with the comparator circuitry. Comparison includes detecting when a difference exists between the voltage level of the preconditioned first signal and the voltage level of the preconditioned second signal.