Philip G. Emma - Danbury CT, US Allan M. Hartstein - Chappaqua NY, US Keith N. Langston - Woodstock NY, US Brian R. Prasky - Wappingers Falls NY, US Thomas R. Puzak - Ridgefield CT, US Charles F. Webb - Wappingers Falls NY, US
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
G06F 9/312
US Classification:
712225, 712240
Abstract:
A method for branch prediction, the method comprising, receiving a load instruction including a first data location in a first memory area, retrieving data including a branch address and a target address from the first data location, and saving the data in a branch prediction memory, or receiving an unload instruction including the first data location in the first memory area, retrieving data including a branch address and a target address from the branch prediction memory, and saving the data in the first data location.
Philip G. Emma - Danbury CT, US Allan M. Hartstein - Chappaqua NY, US Keith N. Langston - Woodstock NY, US Brian R. Prasky - Wappingers Falls NY, US Thomas R. Puzak - Ridgefield CT, US Charles F. Webb - Wappingers Falls NY, US
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
G06F 9/38 G06F 9/30
US Classification:
712208, 712239, 712E0906, 712E09016
Abstract:
A method for branch prediction, the method comprising, receiving a branch wrong guess instruction having a branch wrong guess instruction address and data including an opcode and a branch target address, determining whether the branch wrong guess instruction was predicted by a branch prediction mechanism, sending the branch wrong guess instruction to an execution unit responsive to determining that the branch wrong guess instruction was predicted by the branch prediction mechanism, and receiving and decoding instructions at the branch target address.
Philip G. Emma - Danbury CT Joshua W. Knight - Mohegan Lake NY Keith N. Langston - Ulster Park NY James H. Pomerene - Chappaqua NY Thomas R. Puzak - Ridgefield CT
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
G06F 1120
US Classification:
395403
Abstract:
A method for addressing data in a cache unit which has a plurality of congruence classes, following a failure which disables one or more of the congruence classes in the cache unit. A plurality of synonym classes are established. A subset of the congruence classes is assigned to each of the synonym classes. Any disabled congruence classes are identified. The synonym class to which the disabled congruence class belongs is identified. An alternate congruence class is selected which belongs to the same synonym class as the disabled congruence class. When a request is received by the cache to store a line of data into the disabled congruence class, the line is stored into the alternate congruence class in response to the request.
Method And System For Cache Memory Congruence Class Management In A Data Processing System
Robert A. Blackburn - North Salem NY Keith N. Langston - Ulster Park NY Peter G. Sutton - Yorktown Heights NY
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
G06F 1203 G06F 1210
US Classification:
395400
Abstract:
A method and system for cache memory congruence class management in a data processing system. A selected address within a data processing system will typically have a single real address, but may have multiple virtual addresses within multiple virtual address spaces in a multi-tasking system, each virtual address space including a segment index, a page index and a byte index. A memory cache may be utilized to improve processor performance by hashing a portion of each virtual memory address to an address within a congruence class in the cache; however, when the cache contains a greater number of congruence classes than the number of different byte index addresses the virtual memory addresses of a single real memory address may hash to different congruence classes, reducing the ability of the processor to rapidly locate data within the cache. The method and system prevents this problem by first determining whether or not a virtual memory address exists within any virtual memory space in the system which corresponds to a selected address in real memory, in response to a request for a virtual memory address corresponding to that selected address. If such a virtual memory address already exists, a new virtual memory address is assigned such that the new virtual memory address will hash to the same congruence class as the existing virtual memory address, greatly enhancing the processor's efficiency at retrieving data within the cache.
Isbn (Books And Publications)
Cakavian Prosody: The Accentual Patterns of the Cakavian Dialects of Croatian