Kelly S Williams

US Patent:

20150228757, Aug 13, 2015

Filed:

Feb 12, 2014

Appl. No.:

14/178511

Inventors:

- Armonk NY, US
Phil C. Paone - Rochester MN, US
David P. Paulsen - Dodge Center MN, US
Gregory J. Uhlmann - Rochester MN, US
Kelly L. Williams - Austin TX, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

H01L 29/66
H01L 29/423
H01L 21/28

Abstract:

A method of making a semiconductor device in a gate first process with side gate assists. A first gate may be formed within a gate region. The first gate may include a first gate conductor separated from a semiconductor substrate by a first insulator disposed between the first gate conductor and the semiconductor substrate. A second gate may be formed within the gate region. The second gate may include a second gate conductor separated from a vertical surface of the first gate conductor and the semiconductor substrate by a second insulator. A first electrical contact and a second electrical contact may be formed. The first and second electrical contacts may be disposed on opposite ends of the gate region for respectively connecting the first gate conductor and the second gate conductor to a respective voltage.

US Patent:

20150162266, Jun 11, 2015

Filed:

Feb 10, 2015

Appl. No.:

14/618106

Inventors:

- Armonk NY, US
Phil C. Paone - Rochester MN, US
David P. Paulsen - Inver Grove Heights MN, US
Gregory J. Uhlmann - Rochester MN, US
Kelly L. Williams - Austin TX, US

International Classification:

H01L 23/48
H01L 21/66
H01L 23/00
H01L 23/525

Abstract:

A semiconductor chip includes a substrate having a frontside and a backside coupled to a ground. The chip includes a circuit in the substrate at the frontside. A through silicon via (TSV) having a front-end, a back-end, and a lateral surface is included. The back-end and lateral surface of the TSV are in the substrate, and the front-end of the TSV is substantially parallel to the frontside of the substrate. The chip also includes an antifuse material deposited between the back-end and lateral surface of the TSV and the substrate. The antifuse material insulates the TSV from the substrate. The chip includes a ground layer insulated from the substrate and coupled with the TSV and the circuit. The ground layer conducts a program voltage to the TSV to cause a portion of the antifuse material to migrate away from the TSV, thereby connecting the circuit to the ground.