Kenneth B Adkins

US Patent:

6400605, Jun 4, 2002

Filed:

May 30, 2000

Appl. No.:

09/583319

Inventors:

Kenneth C. Adkins - Fremont CA

Assignee:

Summit Microelectronics, Inc. - Campbell CA

International Classification:

G11C 1604

US Classification:

36518518, 36518519

Abstract:

The invention provides a single input pin on an integrated circuit chip that serves multiple functions during normal, test, and program modes. A first voltage detector detects a first predetermined high voltage level to place an integrated circuit in test mode. A second voltage detector detects a second predetermined high voltage level to place the integrated circuit in program mode. A high level switch is triggered to activate a pulse shaping circuit, which ramps up voltage gradually to prevent causing damage to programmable cells.

US Patent:

6791879, Sep 14, 2004

Filed:

Sep 23, 2002

Appl. No.:

10/252891

Inventors:

Kenneth C. Adkins - Fremont CA

Assignee:

Summit Microelectronics, Inc. - San Jose CA

International Classification:

G11C 1134

US Classification:

36518521, 365207

Abstract:

A programmable and non-volatile analog signal storage structure and method are disclosed that employ two non-volatile cells which are arranged as a differential transistor pair. The non-volatile transistor at the positive (or non-inverting) terminal of the amplifier is referred to as the reference cell, while the non-volatile transistor on the negative (or inverting) input of the amplifier is referred to as the storage cell. The structure comprises a storage cell and a reference cell that produces a voltage which is independent of temperature and supply voltage variation. Additionally, the circuit structure is capable of operating at low supply voltage levels (1. 5V).

US Patent:

7002266, Feb 21, 2006

Filed:

Nov 13, 2002

Appl. No.:

10/294842

Inventors:

Kenneth C. Adkins - Fremont CA, US
Theodore Martin Myers - Los Altos CA, US
John Tabler - San Jose CA, US
Anurag Kaplish - Mountain View CA, US
Thomas J. O'Obrien - Campbell CA, US

Assignee:

Summit Microelectronics - San Jose CA

International Classification:

H02M 3/16

US Classification:

307151, 323266

Abstract:

A control loop system is provided that employs an active DC output control circuit that more accurately calibrates the desire voltage at a load, e. g. 3. 3 volts, by adjusting a trim pin on a DC/DC converter. In a first embodiment, an active DC output control circuit calibrates a DC/DC converter that is connected to a single load. In a second embodiment, an active DC output control circuit calibrates multiple DC/DC converters that are connected to multiple loads.

US Patent:

55326536, Jul 2, 1996

Filed:

Feb 7, 1995

Appl. No.:

8/384980

Inventors:

Kenneth C. Adkins - Fremont CA

Assignee:

National Semiconductor Corporation - Santa Clara CA

International Classification:

H03B 504
H03B 506
H03B 524
H03K 3011

US Classification:

331143

Abstract:

A charge pump oscillator for regulating an oscillator frequency over a wide range of supply voltages is disclosed. Such a charge pump oscillator provides a charge pump system that provides a consistent current output over a range of supply voltages. The charge pump oscillator includes a reference circuit, a timing circuit, a latch circuit and a driver circuit.

US Patent:

61572640, Dec 5, 2000

Filed:

Jul 30, 1999

Appl. No.:

9/364515

Inventors:

Kenneth C. Adkins - Fremont CA

Assignee:

Summit Microelectronics, Inc. - Campbell CA

International Classification:

H03L 7085
H03L 718

US Classification:

331 25

Abstract:

A phased-lock loop is disclosed for capturing the frequency of the input signal by adjusting a tunable oscillator such that a zero-crossing detector detects a zero-crossing point of the input signal relative to a predetermined number of counts at a counter where a control logic increments a tuning counter to increase the frequency at the tunable oscillator while decrements the tuning counter to decrease the frequency in the tunable oscillator. The predetermined number of counts at the counter representing one period, a fraction of a period, or a multiple of a period of the frequency of the input signal. The control logic adjusts the count at the tuning counter until the tunable oscillator generates an internal frequency that captures the frequency of the input signal.