Howard E. Rhodes - Boise ID Kirk D. Prall - Boise ID Philip J. Ireland - Boise ID Kenneth N. Hagen - Meridian ID
Assignee:
Micron Technology, Inc. - Boise ID
International Classification:
H01L 21425
US Classification:
438514, 438648
Abstract:
A method of forming electrical contacts includes the step of implanting ions into a contact hole at an angle to create an enlarged plug enhancement region at the bottom of a contact hole. Thus, even if the contact hole is misaligned, over-sized, or over-etched, the enlarged plug enhancement region contains subsequently formed barrier layers and other conductive materials to reduce current leakage into the underlying substrate or into adjacent circuit elements.
Howard E. Rhodes - Boise ID Kirk D. Prall - Boise ID Philip J. Ireland - Boise ID Kenneth N. Hagen - Meridian ID
Assignee:
Micron Technology, Inc. - Boise ID
International Classification:
H01L 2348
US Classification:
257773, 257774
Abstract:
A method of forming electrical contacts includes the step of implanting ions into a contact hole at an angle to create an enlarged plug enhancement region at the bottom of a contact hole. Thus, even if the contact hole is misaligned, over-sized, or over-etched, the enlarged plug enhancement region contains subsequently formed barrier layers and other conductive materials to reduce current leakage into the underlying substrate or into adjacent circuit elements.
Howard E. Rhodes - Boise ID Kirk D. Prall - Boise ID Philip J. Ireland - Boise ID Kenneth N. Hagen - Meridian ID
Assignee:
Micron Technology, Inc. - Boise ID
International Classification:
H01L 214763
US Classification:
438648
Abstract:
A method of forming electrical contacts includes the step of implanting ions into a contact hole at an angle to create an enlarged plug enhancement region at the bottom of a contact hole. Thus, even if the contact hole is misaligned, over-sized, or over-etched, the enlarged plug enhancement region contains subsequently formed barrier layers and other conductive materials to reduce current leakage into the underlying substrate or into adjacent circuit elements.
Method Of Annealing Film Stacks And Device Having Stack Produced By Same
Kenneth Hagen - Meridian ID Howard E. Rhodes - Boise ID
Assignee:
Micron Technology, Inc. - Boise ID
International Classification:
H01L 214763 H01L 2131 H01L 21469
US Classification:
438632
Abstract:
An annealing method includes providing a wafer having a film stack including at least a flowable film and a semirigid film formed on the flowable film. The film stack is exposed to an initial temperature followed by exposure to an intermediate temperature for an intermediate exposure time period. Then, the film stack is exposed to a final anneal temperature for a final anneal exposure time period. The film stack may include another nonflowable or flowable film formed on the semirigid film. The film stack may be exposed to one or more additional intermediate temperatures for additional intermediate exposure time periods. The film stack may be an oxide/polysilicon/oxide film stack and the oxide films may be doped oxides. A device or wafer having a film stack annealed in accordance with the annealing method is also provided.
Semiconductor Devices And Semiconductor Devices Including A Redistribution Layer
A method of forming a conductive material on a semiconductor device. The method comprises removing at least a portion of a conductive pad within an aperture in a dielectric material over a substrate. The method further comprises forming a seed material at least within a bottom of the aperture and over the dielectric material, forming a protective material over the seed material within the aperture, and forming a conductive pillar in contact with the seed material through an opening in the protective material over surfaces of the seed material within the aperture. A method of forming an electrical connection between adjacent semiconductor devices, and a semiconductor device, are also described.
Semiconductor Devices Including Conductive Pillars
A method of forming a conductive material on a semiconductor device. The method comprises removing at least a portion of a conductive pad within an aperture in a dielectric material over a substrate. The method further comprises forming a seed material at least within a bottom of the aperture and over the dielectric material, forming a protective material over the seed material within the aperture, and forming a conductive pillar in contact with the seed material through an opening in the protective material over surfaces of the seed material within the aperture. A method of forming an electrical connection between adjacent semiconductor devices, and a semiconductor device, are also described.
Methods Of Forming Conductive Pillars For Semiconductor Devices, Methods Of Forming Electrical Interconnects, And Semiconductor Devices
A method of forming a conductive material on a semiconductor device. The method comprises removing at least a portion of a conductive pad within an aperture in a dielectric material over a substrate. The method further comprises forming a seed material at least within a bottom of the aperture and over the dielectric material, forming a protective material over the seed material within the aperture, and forming a conductive pillar in contact with the seed material through an opening in the protective material over surfaces of the seed material within the aperture. A method of forming an electrical connection between adjacent semiconductor devices, and a semiconductor device, are also described.
Hudson Park Elementary School Rainier OR 1971-1974, Clatskanie High School Clatskanie OR 1985-1988, Superior High School Superior MT 1996-1998
Community:
John Raskovich, Paula Wilkinson, Kellie Vanhuss, Sam Larock, Tamara Sanchez, Bobby Rowden, John Collins, Amy Kelsey, Jamie Schultz, Candice Brown, Olga School