Kenneth E Hicks

US Patent:

20180034448, Feb 1, 2018

Filed:

Sep 29, 2016

Appl. No.:

15/281064

Inventors:

- Suwon-si, KR
Kenneth HICKS - Austin TX, US
Jan-Michael HUBER - Austin TX, US
Rajesh KAPALURU - Austin TX, US
Prashant KENKARE - Austin TX, US

International Classification:

H03K 3/012
G05F 3/20
H03K 17/687

Abstract:

According to one general aspect, an apparatus may include a power header and a logic circuit. The power header may include a gate terminal, a first channel terminal, a second channel terminal, and a bulk terminal coupled with a first voltage power signal. The power header may be configured to perform one of dynamically coupling or decoupling a logic circuit with the first voltage power signal. The logic circuit may include a bulk terminal coupled with a second voltage power signal and a power terminal that is either dynamically coupled or decoupled, as determined by the power header, with the first voltage power signal. A power sequencing signal may be included in the apparatus and may be configured to control the power header such that, when active, the power header couples the logic circuit with the first voltage power signal after the second voltage power signal is high.