Kenneth R Murray

US Patent:

6429744, Aug 6, 2002

Filed:

Jul 13, 2001

Appl. No.:

09/904806

Inventors:

Kenneth W. Murray - Tucson AZ
Joel M. Halbert - Tucson AZ

Assignee:

Texas Instruments Incorporated - Dallas TX

International Classification:

H03F 326

US Classification:

330267, 330263, 330268

Abstract:

A bias rail buffer circuit and method in accordance with the present invention overcomes many shortcomings of the prior art. A bias rail buffer circuit for providing a reference signal is suitably configured to absorb external disturbances appearing on an output reference signal. A method for absorbing the external disturbances appearing at the output reference signal suitably includes the use of complementary transistors to source current and sink current to said output reference signal, depending on whether the external disturbances are providing a decrease or an increase to the output reference signal. The bias rail buffer circuit suitably includes an input transistor, a first pair of complementary transistors and a second pair of complementary transistors, such that the second pair of complementary transistors operate to source current and sink current to absorb external disturbances imparted on said output reference signal.

US Patent:

6552613, Apr 22, 2003

Filed:

Jul 31, 2002

Appl. No.:

10/209767

Inventors:

Kenneth W. Murray - Tucson AZ
Joel M. Halbert - Tucson AZ

Assignee:

Texas Instruments Tucson Corporation - Tucson AZ

International Classification:

H03F 345

US Classification:

330255, 330257, 330263, 330267

Abstract:

An output stage amplifier circuit in accordance with the present invention overcomes many shortcomings of the prior art. A output stage amplifier circuit for providing a high output voltage and current reference signal suitably includes an output buffer configured with a compensation circuit for reducing disturbances introduced into the output stage amplifier circuit by voltage supply rails, such as parasitic ringing and other disturbances. The compensation circuit can suitably comprise a first compensation device, such as at least one capacitor, and a second compensation device, such as at least one capacitor. The compensation devices are suitably coupled between an input terminal of the output stage amplifier circuit and a pair of transistors proximate a pair of output transistors of the output stage amplifier circuit, and are configured to provide âpole-zeroâ compensation to the output stage amplifier circuit.

US Patent:

53242653, Jun 28, 1994

Filed:

Oct 20, 1993

Appl. No.:

8/139467

Inventors:

Kenneth W. Murray - Littleton CO
Charles C. Gabbard - Mt. Juliet TN
Nola M. H. Gabbard - Mt. Juliet TN

Assignee:

Gabbard Murray Gabbard Inc. - Mt. Juliet TN

International Classification:

A61M 532

US Classification:

604110

Abstract:

A hypodermic safety syringe, according to the present invention, includes a barrel having an open end, a cone shaped end and an interior surface. A hollow needle and carriage assembly is temporarily attached and is restrained by four catches extending from the interior tapered surface. A plunger assembly is reciprocally received into the barrel and is in air-tight engagement with the interior surface of the barrel. Thus, an interior chamber is formed in the barrel whereby liquids are retreived and emmited through the hollow needle. A cavity within the plunger contains a spring and retraction guide assembly with a mating member corresponding to mating members extending from the needle carriage. As the mating members contact and become captured the needle and carriage assembly is released by the approaching plunger assembly as the catches are deflected outward by the angled surface of the plunger. At the end of the injection stroke small spherical bearings, in locking contact with the retraction guide, are caused to move outward and into a radially concave interior surface releasing the retraction guide, captured needle and carriage assembly thereby retracted into the cavity within the plunger structure.

US Patent:

56232322, Apr 22, 1997

Filed:

Sep 26, 1995

Appl. No.:

8/534046

Inventors:

Joel M. Halbert - Tucson AZ
Kenneth W. Murray - Tucson AZ
Dan Yuan - Tucson AZ

Assignee:

Burr-Brown Corporation - Tucson AZ

International Classification:

H03F 130
H03F 3213

US Classification:

330307

Abstract:

A high speed integrated circuit operational amplifier chip first, second, third and fourth successive edges includes a thermal centerline parallel to the second and fourth edges. An output driver circuit is located adjacent to an output bonding pad along the third edge and is disposed approximately symmetrically about the thermal centerline to provide approximately balanced differential heating of the operational amplifier chip relative to the thermal centerline. A differential input circuit is located adjacent to the first edge and is disposed approximately symmetrically about the thermal centerline to provide approximately balanced responses of matched transistors in the low gain differential input circuit to isotherms produced by the differential heating. The most thermally sensitive transistors are disposed along or symmetrically about the thermal centerline to provide approximately balanced response by such transistors to differential heating by the output driver circuit. The bonding pads, which function as heat sinks, also are symmetrically disposed on or about the thermal centerline.

US Patent:

62783262, Aug 21, 2001

Filed:

Oct 19, 2000

Appl. No.:

9/692370

Inventors:

Kenneth W. Murray - Tucson AZ
Joel M. Halbert - Tucson AZ

Assignee:

Texas Instruments Tucson Corporation - Tucson AZ

International Classification:

H03F 304

US Classification:

330288

Abstract:

A current mirror circuit in accordance with the present invention overcomes many shortcomings of the prior art. A current mirror circuit for providing a current reference signal suitably includes at least one degeneration resistor to provide more degeneration for lower voltage noise while also including at least one clamping device to preventing saturation of the current mirror. The clamping device suitably comprises at least one diode, such as, for example, a Schottky-type diode. Moreover, the clamping device can be suitably configured to facilitate a higher slew rate of the current mirror circuit.

US Patent:

62976990, Oct 2, 2001

Filed:

Oct 19, 2000

Appl. No.:

9/692017

Inventors:

Kenneth W. Murray - Tucson AZ
Joel M. Halbert - Tucson AZ

Assignee:

Texas Instruments Corporation - Tucson AZ

International Classification:

H03F 326

US Classification:

330267

Abstract:

A bias rail buffer circuit and method in accordance with the present invention overcomes many shortcomings of the prior art. A bias rail buffer circuit for providing a reference signal is suitably configured to absorb external disturbances appearing on an output reference signal. A method for absorbing the external disturbances appearing at the output reference signal suitably includes the use of complementary transistors to source current and sink current to said output reference signal, depending on whether the external disturbances are providing a decrease or an increase to the output reference signal. The bias rail buffer circuit suitably includes an input transistor, a first pair of complementary transistors and a second pair of complementary transistors, such that the second pair of complementary transistors operate to source current and sink current to absorb external disturbances imparted on said output reference signal.

US Patent:

56232292, Apr 22, 1997

Filed:

Aug 16, 1996

Appl. No.:

8/696574

Inventors:

Kenneth W. Murray - Tucson AZ

Assignee:

Burr-Brown Corporation - Tucson AZ

International Classification:

H03F 345

US Classification:

330255

Abstract:

A compensation circuit in a high speed integrated circuit operational amplifier that includes an input stage having first and second outputs connected to emitters of first and second PNP cascode transistors. A base of an cascode transistor is coupled to a collector of the first PNP cascode transistor. A resistor circuit is connected between the collectors of the second PNP cascode transistor and the NPN cascode transistor. First and second inputs of a diamond follower output buffer are connected to the collectors of the NPN cascode transistor and second PNP cascode transistor, respectively. A compensation circuit includes first and second compensation capacitors connected to the collectors of the NPN cascode transistor and the second PNP cascode transistor, respectively, to prevent instability of an output voltage of the diamond follower buffer circuit.

US Patent:

51905264, Mar 2, 1993

Filed:

Sep 18, 1992

Appl. No.:

7/946662

Inventors:

Kenneth W. Murray - Littleton CO
Charles C. Gabbard - Mount Juliet TN
Nola M. H. Gabbard - Mount Juliet TN

International Classification:

A61M 500

US Classification:

604110

Abstract:

A hypodermic safety syringe, according to the present invention, includes a barrel having an open end, a cone shaped end and an interior surface. A hollow needle and carriage assembly is temporarily attached and is restrained by four catches extending from the interior tapered surface. A plunger assembly is reciprocally received into the barrel and is in air-tight engagement with the interior surface of the barrel. Thus, an interior chamber is formed in the barrel whereby liquids are retrieved and emitted through the hollow needle. A cavity within the plunger contains a spring and retraction guide assembly with a mating member corresponding to mating members extending from the needle carriage. As the mating members contact and become captured the needle and carriage assembly is released by the approaching plunger assembly as the catches are deflected outward by the angled surface of the plunger. At the end of the injection stroke small spherical bearings, in locking contact with the retraction guide, are caused to move outward and into a radially concave interior surface releasing the retraction guide, captured needle and carriage assembly thereby retracted into the cavity within the plunger structure.