Kenneth Yi Yun

US Patent:

6791992, Sep 14, 2004

Filed:

Jun 5, 2000

Appl. No.:

09/586812

Inventors:

Kenneth Y. Yun - San Diego CA
Kevin W. James - San Diego CA

Assignee:

The Regents of the University of California - LaJolla CA

International Classification:

H04L 1228

US Classification:

370415, 370461, 370462

Abstract:

The cell switching architecture of the present invention uses at least one earliest deadline first (EDF) queue for each of the output ports in a cell switch so that no two output ports have a common earliest-deadline-first queue. Cells are arranged in each EDF queue according to deadline, but each EDF queue only contains cells for a single destination output port. Each input port also has an input queue with an EDF queue for each of the output ports, and each EDF queue arranges the cells for a single output port. Many equivalent cells may be represented by a single EDF queue entry, enabling large buffer capacity to be supported by small EDF queues. The architecture provides a method for switching cells between a plurality of input ports and a plurality of output ports. Cells are accepted from input ports into a plurality of corresponding input queues. Cells are sorted into groups according to the destination output port such that each group includes cells destined for a single output port.

US Patent:

7020131, Mar 28, 2006

Filed:

Dec 24, 2001

Appl. No.:

10/035835

Inventors:

Kenneth Yi Yun - San Diego CA, US
Kevin Warren James - San Diego CA, US

Assignee:

Applied Micro Circuits Corp. - San Diego CA

International Classification:

H04L 12/66
H04L 12/50
H04L 12/28
H04Q 11/00
H04J 3/02
G06F 13/00

US Classification:

370355, 370360, 370386, 370412, 370389, 370462, 710317

Abstract:

A system and method have been provided for hierarchically arbitrating in a broadband information switching network. The method promotes the fair and efficient distribution of information packets across the switch fabric that ultimately permits the switch to maximally match information packets to switch output addresses, at faster rates and higher throughput. The method comprises: accepting variably sized information packets at a plurality of switch inputs, that address a plurality of switch outputs; at each switch input, queuing the information packets into a plurality of queues; parsing the information packets into units of one cell; simultaneously arbitrating between each switch output and a plurality of available switch inputs, where an available input is defined to have at least one queue with an information packet addressing that particular switch output; selecting a queue; locking the link between switch inputs and switch outputs; and, transferring information packets across the links in units of one cell per master decision cycle.

US Patent:

7079545, Jul 18, 2006

Filed:

Dec 17, 2001

Appl. No.:

10/022673

Inventors:

Kenneth Yi Yun - San Diego CA, US
Kevin Warren James - San Diego CA, US

Assignee:

Applied Microcircuits Corporation ( AMCC) - San Diego CA

International Classification:

H04L 12/56

US Classification:

370412, 370429

Abstract:

A system and method have been provided for prioritizing queued information packets having a variable number of cells. A simultaneous deficit round robin (DRR) analysis occurs in the course of several selection cycles. Each queue has an associated increment value. The packet lengths in each queue are simultaneously compared to an accumulation total in every selection cycle. If all the packets have lengths greater than their corresponding accumulation totals, each accumulation total is incremented and the selection process is repeated. If one of the information packets has a number of cells less than, or equal to its corresponding accumulation total, it is selected. In case multiple information packets are eligible, a variety of selection criteria can be used to break a tie. For example, the eligible information packet with the highest class of service (COS) can be selected. The information packet is completed transferred before another selection process is begun.

US Patent:

7209453, Apr 24, 2007

Filed:

Mar 3, 2003

Appl. No.:

10/378521

Inventors:

Kenneth Yi Yun - San Diego CA, US
Michael John Hellmer - Carlsbad CA, US
David Thomas Dougherty - Allentown PA, US
Philip Michael Clovis - San Diego CA, US
Eli James Aubrey Fernald - San Diego CA, US
Peter John Holzer - Fallbrook CA, US

Assignee:

Applied Micro Circuits Corporation - San Diego CA

International Classification:

H04J 1/16
H04J 3/14

US Classification:

370242, 370244, 370250

Abstract:

A system and method are provided for tolerating control link faults in a packet communications switch fabric. The method comprises: accepting information packets including a plurality of cells, at a plurality of port card ports, the plurality of information packets addressing a plurality of port card ports; selectively connecting port card ports to port card backplane data links; in response to backplane control link communications, selectively connecting port card backplane data links and crossbars; sensing a connection fault in a control link; and, in response to sensing the control link fault, reselecting connections between the port card ports and the port card backplane data links. In some aspects, selectively connecting port card backplane data links and crossbars includes: for a particular backplane data link, fixedly connecting each port card to a corresponding interface of an assigned crossbar; and, selectively enabling the connection to each crossbar.

US Patent:

7221652, May 22, 2007

Filed:

Mar 3, 2003

Appl. No.:

10/378480

Inventors:

Sushil Kumar Singh - San Diego CA, US
Kenneth Yi Yun - San Diego CA, US
Jianfeng Shi - Encinitas CA, US
Eli James Aubrey Fernald - San Diego CA, US
Kirk Alvin Miller - San Diego CA, US
Prayag Bhanubhai Patel - San Diego CA, US
Ayoob Eusoof Dooply - San Diego CA, US
George Beshara Bendak - San Diego CA, US

Assignee:

Applied Micro Circuits Corporation - San Diego CA

International Classification:

G01R 31/08

US Classification:

370242, 370390

Abstract:

A system and method are provided for tolerating data line faults in a packet communications network. The method comprises: serially transmitting information packets from at least one traffic manager (TM); at a switch fabric, accepting information packets at a plurality of ingress ports, the information packets addressing destination port card egress ports; selectively connecting port card ingress ports to port card egress ports; serially supplying information packets from a plurality of port card egress ports; sensing a connection fault between the switch fabric and the TM; and, in response to sensing the fault, reselecting connections between the switch fabric port card ports and the TM. Some aspects comprise: an ingress memory subsystem (iMS) receiving cells on an ingress port exceeding an error threshold. Then, reselecting connections between the port card ports and the TM includes the iMS sending a message to the iTM identifying the faulty ingress connection.

US Patent:

7230947, Jun 12, 2007

Filed:

Mar 3, 2003

Appl. No.:

10/378502

Inventors:

John David Huber - San Diego CA, US
Kirk Alvin Miller - San Diego CA, US
Michael John Hellmer - Carlsbad CA, US
Kenneth Yi Yun - San Diego CA, US
Kevin Warren James - San Diego CA, US
George Beshara Bendak - San Diego CA, US

Assignee:

Applied Micro Circuits Corporation - San Diego CA

International Classification:

H04Q 11/00

US Classification:

370386, 370390

Abstract:

A system and method are provided for cut-through packet routing in a packet communications switch fabric. The method comprises: accepting information packets addressed to a plurality of output port card egress ports at an input port card ingress port; routing information packets between port cards on backplane data links through an intervening crossbar; maintaining a credit counter for each port card egress destination, at the input port card; decrementing the counter in response to transmitting cells in a packet from the input port card; and, incrementing the counter in response to transmitting cells from the packet at the output port card. In some aspects of the method, accepting information includes buffering the packets in an ingress memory subsystem (iMS). Routing information includes the iMS transmitting buffered packets on a selected backplane data link. Decrementing the counter includes the iMS communicating with the iPQ in response to transmitting a cell.

US Patent:

7242686, Jul 10, 2007

Filed:

Mar 31, 2003

Appl. No.:

10/403566

Inventors:

David Thomas Dougherty - Rancho Santa Fe CA, US
Michael Alec Sluyski - Maynard MA, US
Kenneth Yi Yun - San Diego CA, US
George Beshara Bendak - San Diego CA, US
John David Huber - San Diego CA, US
Kirk Alvin Miller - San Diego CA, US
Peter John Holzer - Fallbrook CA, US

Assignee:

Applied Micro Circuits Corporation - San Diego CA

International Classification:

H04L 12/56

US Classification:

3703954, 370401, 370498

Abstract:

A system and method are provided for communicating TDM communications through a packet switch fabric. The method comprises: accepting native TDM frames; converting the native TDM frames to fabric-cellified TDM frames; differentiating the cells of each frame into time slots; interleaving the frame time slots; TDM scheduling the interleaved frame time slots; and, routing the interleaved frame time slots between input port cards and output port cards on backplane data links through an intervening crossbar. TDM scheduling the interleaved frame time slots includes: an input port card ingress memory subsystem (iMS) receiving a first TDM configuration schedule including interleaved frame time slots cross-referenced to backplane transmission times; and, an output port card egress MS (eMS) receiving a second TDM configuration schedule including interleaved frame time slots cross-referenced to egress channel transmission times. Then, the routing is performed in response to the TDM schedules.

US Patent:

7298739, Nov 20, 2007

Filed:

Mar 3, 2003

Appl. No.:

10/378403

Inventors:

Kirk Alvin Miller - San Diego CA, US
Philip Michael Clovis - San Diego CA, US
John David Huber - San Diego CA, US
Kenneth Yi Yun - San Diego CA, US
Peter John Holzer - Fallbrook CA, US
John Calvin Leung - San Diego CA, US

Assignee:

Applied Micro Circuits Corporation - San Diego CA

International Classification:

H04L 12/50

US Classification:

370373, 370225, 370244, 370461

Abstract:

A system and method are provided for communicating control information in a switch fabric. The method comprises: on a switch card, establishing a plurality of crossbars controlled by an arbiter; initiating a control message; and, distributing the control message on a switch card token bus connecting the crossbars and arbiter elements. Distributing the control message on a switch card token bus connecting the crossbar and arbiter elements includes daisy-chain connecting the elements with a cyclical bus. In some aspects of the method, establishing a plurality of crossbars controlled by an arbiter includes identifying each element with a unique address. Then, initiating a control message includes initiating a control message with an attached address. Distributing the control message on a switch card token bus includes the substeps of: daisy-chain passing the control message between elements; and, terminating the message at an element having an address matching the address attached to the control message.