Kevin C Parmenter

US Patent:

6584326, Jun 24, 2003

Filed:

Dec 8, 1999

Appl. No.:

09/457752

Inventors:

Thad Boydston - Kansas City MO
Kevin Parmenter - Overland Park KS
Daniel R. Barbour - Overland Park KS

Assignee:

AlliedSignal Inc. - Morristown NJ

International Classification:

H04B 138

US Classification:

455558, 455557, 455550

Abstract:

A method and circuit for performing serial data protocols and error checking, the circuit in a mobile cellular to satellite telecommunication system.

US Patent:

6615052, Sep 2, 2003

Filed:

Dec 8, 1999

Appl. No.:

09/457751

Inventors:

Kevin C. Parmenter - Overland Park KS

Assignee:

Honeywell International Inc. - Morristown NJ

International Classification:

H04B 700

US Classification:

455522, 455 134

Abstract:

The disclosure describes a method and system for dynamically adjusting the output power level in each channel of a multichannel mobile cellular to satellite telecommunication system, the power levels of the voice and data channels being preset to appropriate initial output power levels, the initial power level for data channels being higher than the initial power level for voice channels. The method includes receiving a call request from communication equipment on one of the plurality of channels; determining whether the call is a voice call or a data call, determining whether a transmission channel is available for the call; assigning the call to an available voice or data transmission channel; looking up pre-stored power parameters for each active transmission channel; transmitting the parameters to each active transmission channel via a message; and dynamically adjusting the output power of each active transmission channel in response to the transmitted parameters.

US Patent:

7529105, May 5, 2009

Filed:

Nov 3, 2006

Appl. No.:

11/592372

Inventors:

Jin Ho Choi - Lewisville TX, US
Richard Chang-Wei Chung - Austin TX, US
Kevin Parmenter - Tempe AZ, US

Assignee:

Fairchild Semiconductor Corporation - South Portland ME

International Classification:

H02M 3/335

US Classification:

363 2112, 363 2118, 363 97, 363131

Abstract:

In one embodiment, a method is provided for a power converter system. The method includes: automatically configuring the power converter system to operate with burst mode functionality if a control module of the power converter system is coupled in a first arrangement; and automatically configuring the power converter system to operate without burst mode functionality if the control module of the power converter system is coupled in a second arrangement.

US Patent:

8570192, Oct 29, 2013

Filed:

Sep 10, 2012

Appl. No.:

13/608816

Inventors:

Frank A. McLoughlin - Leawood KS, US
Steven B. Willhoite - Louisburg KS, US
Walter J. Rolston - Overland Park KS, US
Joseph E. Gepner - Overland Park KS, US
Kevin C. Parmenter - Overland Park KS, US
Cory N. Douthat - Kansas City MO, US
Ryan C. Stark - Olathe KS, US

Assignee:

Garmin International, Inc. - Olathe KS

International Classification:

G08B 21/00

US Classification:

340973, 340945, 340971, 701 3, 701 14

Abstract:

A multi-product avionics control and display unit (CDU). In implementations, the CDU may include a display and a processor coupled with the display. The processor is configurable to operate in a first mode to cause the display to present standby primary flight information associated with the aircraft and a second mode to control and display operation of one or more aircraft systems associated with the aircraft.

US Patent:

55793533, Nov 26, 1996

Filed:

Jul 26, 1995

Appl. No.:

8/499066

Inventors:

Kevin C. Parmenter - Carrollton TX
Yutaka Takahashi - Dallas TX

Assignee:

Texas Instruments Incorporated - Dallas TX

International Classification:

H03D 324

US Classification:

375376

Abstract:

A dynamic clock mode switch (11) is provided for switching clock frequencies while allowing continuing operation of a depending system. The switch includes an enable circuit for transmitting an enable signal, a phase-locked loop circuit (PLL) (15) for locking onto an input clock frequency in response to said enable circuit, a PLL lock indicator for receiving a PLL lock signal (29) from said PLL, and a clock multiplexer with a multiplier for multiplying said input clock frequency by a predetermined factor in response to said enable circuit and PLL clock signals.

US Patent:

55727239, Nov 5, 1996

Filed:

Dec 14, 1995

Appl. No.:

8/572133

Inventors:

Kevin C. Parmenter - Carrollton TX
Yutaka Takahashi - Dallas TX

Assignee:

Texas Instruments Incorporated - Dallas TX

International Classification:

G06F 104

US Classification:

395555

Abstract:

A dynamic clock indicator (11) is provided for indicating the operating mode of a dynamically clocked system. The clock indicator includes a status pin (13) and a status circuit (15) for indicating status of a variable CPU clock. The status circuit provides a status or mode signal to the status pin.