Khanh T Tran

US Patent:

61638188, Dec 19, 2000

Filed:

Aug 27, 1998

Appl. No.:

9/141398

Inventors:

Uoc H. Nguyen - Long Beach CA
Otto Sperber - Huntington Beach CA
Khanh Q. Tran - Irvine CA
David K. Bovaird - West Hills CA

Assignee:

Xerox Corporation - Stamford CT

International Classification:

G06F 1300

US Classification:

710 22

Abstract:

In a system having a PCI bus, an additional memory attached to the bus to allow a higher speed of data transfer for a number of copies from the computer to a number of devices. The additional memory has a number of DMA channels, each associated with an I/O device. One copy of the data required by an I/O device is transferred to the memory at normal computer FIFO speed. Thereafter, multiple copies of that data can be transferred to the I/O device from the memory at the higher data bus speed.

Address:

17175 San Mateo St APT A, Fountain Valley, CA 92708

VIN:

1HGCM726X7A018278

Make:

HONDA

Model:

ACCORD

Year:

2007