Konika D Ganguly

US Patent:

20050201454, Sep 15, 2005

Filed:

Mar 12, 2004

Appl. No.:

10/798557

Inventors:

Santanu Chaudhuri - Mountain View CA, US
James McCall - Beaverton OR, US
Konika Ganguly - Portland OR, US
Michael Gutzmann - Forest Grove OR, US
Sanjay Dabral - Palo Alto CA, US
Ken Drottar - Portland OR, US
Alok Tripathi - Beaverton OR, US
Kersi Vakil - Olympia WA, US

International Classification:

H03K005/159

US Classification:

375229000

Abstract:

A method to calibrate an equalizer for communicating signals over a data link between a transmitter and receiver includes measuring loss in the link and automatically determining a multi-tap equalization setting for the transmitter based on the measured loss. The multi-tap equalization setting may be determined using a look-up table, which stores a plurality of equalization settings for a respective number of link loss values. Once the equalization setting matching the measured link loss is found in the table, the equalizer can be optimally set to reduce or eliminate intersymbol and other types of interference.

US Patent:

20220368047, Nov 17, 2022

Filed:

Jul 26, 2022

Appl. No.:

17/874111

Inventors:

- Santa Clara CA, US
Xiang LI - Portland OR, US
Jun LIAO - Portland OR, US
Anthony M. CONSTANTINE - Portland OR, US
Min Suet LIM - Gelugor, MY
Tongyan ZHAI - Portland OR, US
Konika GANGULY - Portland OR, US

International Classification:

H01R 12/72
G06F 1/18
H01R 13/24
H01R 12/70

Abstract:

An adapter card with compression-attached memory modules that can be inserted into a conventional vertical connector enables use of CAMMs in systems with vertical memory module connectors. In one example, an adapter card or riser card includes a printed circuit board (PCB) having an edge to be received by a dual-inline memory module (DIMM) connector. First conductive contacts proximate to the edge of the PCB are to be received by the DIMM connector, enabling the first conductive contacts to couple with contacts of the DIMM connector. Second conductive contacts on a face of the PCB are to couple with a first compression attached memory module (CAMM) via a first compression mount technology (CMT) connector. The adapter card includes conductive traces on or in the PCB between the first conductive contacts and the second conductive contacts to couple the CAMM with the DIMM connector.

US Patent:

20220358072, Nov 10, 2022

Filed:

Jul 26, 2022

Appl. No.:

17/874117

Inventors:

- Santa Clara CA, US
Xiang LI - Portland OR, US
Jun LIAO - Portland OR, US
Anthony M. CONSTANTINE - Portland OR, US
Min Suet LIM - Gelugor, MY
Tongyan ZHAI - Portland OR, US
Konika GANGULY - Portland OR, US

International Classification:

G06F 13/40
G06F 12/06

Abstract:

A memory module adapter card can adapt multiple compression-attached memory modules (CAMMs) to a dual inline memory module (DIMM) connector. Multiplexer circuitry on the adapter card enables multiplexing data amongst the memory modules attached to the adapter card during a same burst access sequence.

US Patent:

20220360002, Nov 10, 2022

Filed:

Jul 22, 2022

Appl. No.:

17/871611

Inventors:

- Santa Clara CA, US
Konika GANGULY - Portland OR, US
Tongyan ZHAI - Portland OR, US
George VERGIS - Portland OR, US
Anthony M. CONSTANTINE - Portland OR, US
Jun LIAO - Portland OR, US

International Classification:

H01R 12/72
G06F 1/18
H01R 13/24

Abstract:

Methods and apparatus for differential I/O (input/output) cards using compression mount technology (CMT) connectors. Assemblies include a CMT connector having an array of spring-loaded pins or contacts that are configured to contact respective CMT contact pads on a pair of printed circuit board (PCBs), such as an add-in card (AIC) and a motherboard. Stacked assemblies are also disclosed including multiple CMT AIC or PCIe modules communicatively coupled using on module CMT connectors. The connector solutions may be used for AICs without changing the overall PCB form factor outline of existing AICs employing edge connectors. Under a stacked assembly of multiple CMT PCIe modules interconnected by on module CMT connectors, wiring in the PCBs is configured to provide signaling supporting multi-lane PCIe or CXL links for each CMT PCIe module. The CMT connector approach also is scalable and can support more pins/contacts to facilitate additional I/O bandwidth.

US Patent:

20220361328, Nov 10, 2022

Filed:

Jul 22, 2022

Appl. No.:

17/871686

Inventors:

- Santa Clara CA, US
Konika GANGULY - Portland OR, US
Tongyan ZHAI - Portland OR, US
George VERGIS - Portland OR, US
Anthony M. CONSTANTINE - Portland OR, US
Jun LIAO - Portland OR, US

International Classification:

H05K 1/11
H05K 1/18
G06F 1/18

Abstract:

Power conversion modules using compression mount technology (CMT) connectors and associated apparatus and methods. Assemblies include a CMT connector that includes an array of spring-loaded CMT pins or contacts that are configured to contact respective pads on a pair of printed circuit board (PCBs), such as for VR module card or power conversion module and a motherboard. The power conversion modules in combination with the CMT connectors provide several advantages, including, a common VR module/power conversion module/motherboard footprint across OEM platforms and test hardware, just in time VR module attachment for improved inventory management, removable power delivery solution makes the platform more conducive to debug, in field servicing, and platform upgradable for higher power CPU/GPU/XPU.

US Patent:

20220353991, Nov 3, 2022

Filed:

Jul 18, 2022

Appl. No.:

17/866775

Inventors:

- Santa Clara CA, US
Konika Ganguly - Portland OR, US
George Vergis - Portland OR, US
Stephen Christianson - Tigard OR, US
Xiaopeng Dong - Portland OR, US

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

H05K 1/11
H05K 1/18
H05K 1/14

Abstract:

An example of an apparatus may comprise a first set of compression contact pads formed on a first side of a circuit board, a second set of compression contact pads formed on a second side of the circuit board opposite to the first side of the circuit board, where the first set of compression contact pads are respectively electrically connected to the second set of compression pads. An example of the circuit board may include a memory board. An example stackable memory module may include memory devices mounted to both sides of the memory board. Other examples are disclosed and claimed.

US Patent:

20220217846, Jul 7, 2022

Filed:

Mar 22, 2022

Appl. No.:

17/700972

Inventors:

- Santa Clara CA, US
Konika Ganguly - Portland OR, US
George Vergis - Portland OR, US
Stephen Christianson - Tigard OR, US
Xiaopeng Dong - Hillsboro OR, US
Landon Hanks - Milwaukie OR, US

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

H05K 1/14
H05K 1/11
H05K 1/18

Abstract:

An embodiment of an electronic apparatus comprises a circuit board, one or more memory devices affixed to a top side of the circuit board, and one or more board-to-board connectors affixed to a bottom side of the circuit board to provide an external connection to signals of the one or more memory devices, where the one or more board-to-board connectors are located inward from outermost edges of the circuit board and where a first footprint defined by an outermost boundary of the one or more board-to-board connectors is substantially a same size as or smaller than a second footprint defined by an outermost boundary of the one or more memory devices. Other embodiments are disclosed and claimed.

US Patent:

20230007775, Jan 5, 2023

Filed:

Jul 22, 2022

Appl. No.:

17/871542

Inventors:

- Santa Clara CA, US
Konika GANGULY - Portland OR, US
Tongyan ZHAI - Portland OR, US
George VERGIS - Portland OR, US
Anthony M. CONSTANTINE - Portland OR, US
Jun LIAO - Portland OR, US

International Classification:

H05K 1/18
H05K 1/11

Abstract:

Methods and apparatus for GDDR (Graphics Double Date Rate) memory expander using compression mount technology (CMT) connectors. A CMT connector with a dedicated pinout for GDDR-based memory is provided that enables end users and manufacturers to change the amount of GDDR memory provided with a GPU card, accelerator card, or apparatus having other form factors. Memory could also be replaced in the event of a failure. In addition, embodiments are disclosed that support a split channel concept where there could be multiple devices (e.g., GDDR modules) with dedicated signals routed to each module.