Krishnakumar Rama Sundaresan

US Patent:

8484599, Jul 9, 2013

Filed:

Jan 31, 2012

Appl. No.:

13/362583

Inventors:

Krishnakumar Sundaresan - Pleasanton CA, US

Assignee:

Synopsys, Inc. - Mountain View CA

International Classification:

G06F 17/50

US Classification:

716115, 716 52, 716108, 716111, 716112, 716113

Abstract:

Systems and techniques for performing parasitic extraction on a via array are described. If the via array is a single row or column via array, the system identifies a first via and a last via in the via array, and merges a set of vias between the first via and the last via into a center via. If the via array is a M×N (M≧2, N≧2) via array, the system merges the vias as follows: the first row and the last row of vias in the via array into a first row via and a last row via, respectively; the first column and the last column of vias in the via array into a first column via and a last column via, respectively; and a set of vias between the first and last rows and the first and last columns into a center via.