Lahcene Smati

age ~56

from Roseville, CA

Also known as:
  • Smati Lahcene
  • Lahcene Smate
Phone and address:
1832 Ambridge Dr, Roseville, CA 95747

Lahcene Smati Phones & Addresses

  • 1832 Ambridge Dr, Roseville, CA 95747
  • Santa Clara, CA
  • San Jose, CA

Work

  • Company:
    Telefunken semiconductors
    Jan 2013
  • Position:
    Senior process engineer

Education

  • Degree:
    MS
  • School / High School:
    San Jose State University
    2003 to 2006
  • Specialities:
    Chemical Engineering

Skills

Cvd • Thin Films • Design of Experiments • Pvd • Spc • Metrology • Pecvd • Semiconductor Industry • R&D • Mems • Semiconductors • Substrates • Rtp • Process Optimization • Plasma Enhanced Chemical Vapor Deposition • Ic • Process Transfer • Fmea • Chemical Vapor Deposition • Jmp • Physical Vapor Deposition • Engineering Management • Statistical Process Control • Microfabrication • Research and Development • Problem Solving • Teamwork

Industries

Semiconductors

Resumes

Lahcene Smati Photo 1

Staff Engineer

view source
Location:
Roseville, CA
Industry:
Semiconductors
Work:
Telefunken Semiconductors since Jan 2013
Senior Process Engineer

SVTC Technologies Mar 2007 - Oct 2012
Staff Engineer

Cypress Semiconductor 2005 - 2007
Process Engineer

University Ferhat Abbas - Setif, Algeria 1998 - 2000
Assistant Lecturer

AMIA - Algeria 1997 - 1998
Chemistry Teacher
Education:
San Jose State University 2003 - 2006
MS, Chemical Engineering
Université Ferhat Abbas, Sétif 1992 - 1996
MS, Industrial Chemistry
Skills:
Cvd
Thin Films
Design of Experiments
Pvd
Spc
Metrology
Pecvd
Semiconductor Industry
R&D
Mems
Semiconductors
Substrates
Rtp
Process Optimization
Plasma Enhanced Chemical Vapor Deposition
Ic
Process Transfer
Fmea
Chemical Vapor Deposition
Jmp
Physical Vapor Deposition
Engineering Management
Statistical Process Control
Microfabrication
Research and Development
Problem Solving
Teamwork

Us Patents

  • Copper-Free Semiconductor Device Interface And Methods Of Fabrication And Use Thereof

    view source
  • US Patent:
    20080308937, Dec 18, 2008
  • Filed:
    Jun 13, 2008
  • Appl. No.:
    12/138595
  • Inventors:
    Wilbur Catabay - Saratoga CA, US
    Julian Searle - Ripon CA, US
    Wei-Jen Hsia - Saratoga CA, US
    Milan Prejda - San Jose CA, US
    Rohini Ranganathan - San Jose CA, US
    Lahcene Smati - San Jose CA, US
    Majid Milani - San Jose CA, US
  • Assignee:
    SVTC TECHNOLOGIES, LLC - San Jose CA
  • International Classification:
    H01L 23/52
    H01L 21/4763
  • US Classification:
    257751, 438627, 257E23141, 257E21495
  • Abstract:
    Embodiments of copper-free semiconductor device interfaces and methods for forming and/or utilizing the same are provided herein. In some embodiments, a semiconductor structure may include a substrate having an exposed copper-containing feature; and a copper-free interface disposed over the substrate and providing a conductive interconnect between the copper-containing feature and an upper surface of the copper-free interface to facilitate electrical coupling of the substrate to a semiconductor device while physically isolating the semiconductor device from the copper-containing feature.

Get Report for Lahcene Smati from Roseville, CA, age ~56
Control profile